PCF8576CT datasheet(21/44 Pages) PHILIPS

21 / 44 page

1998 Jul 30

Philips Semiconductors

Product speciﬁcation

Universal LCD driver for low multiplex

rates

PCF8576C

After acknowledgement, one or more command bytes (m)

follow which define the status of the addressed

PCF8576Cs.

The last command byte is tagged with a cleared most

significant bit, the continuation bit C. The command bytes

are also acknowledged by all addressed PCF8576Cs on

the bus.

After the last command byte, a series of display data bytes

(n) may follow. These display bytes are stored in the

display RAM at the address specified by the data pointer

and the subaddress counter. Both data pointer and

subaddress counter are automatically updated and the

data is directed to the intended PCF8576C device.

The acknowledgement after each byte is made only by the

(A0, A1 and A2) addressed PCF8576C. After the last

display byte, the I2C-bus master issues a STOP

condition (P).

7.8

Command decoder

The command decoder identifies command bytes that

arrive on the I2C-bus. All available commands carry a

continuation bit C in their most significant bit position

(Fig.17). When this bit is set, it indicates that the next byte

of the transfer to arrive will also represent a command.

If this bit is reset, it indicates the last command byte of the

transfer. Further bytes will be regarded as display data.

The five commands available to the PCF8576C are

defined in Table 5.

Fig.12 Bit transfer.

MBA607

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Fig.13 Definition of START and STOP conditions.

handbook, full pagewidth

MBC622

SDA

SCL

STOP condition

SDA

SCL

START condition

PCF8576CT Datasheet(PDF) 21 Page - NXP Semiconductors

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