ACT86600 datasheet(39/56 Pages) QORVO

39 / 56 page

ACT86600

Hybrid PMIC for Enterprise

Storage and Computing

Data Sheet Rev. B, February 2, 2023

Subject to change without notice

39 of 56

www.qorvo.com

Output Voltage Under/Over Voltage

The ACT86600 monitors each individual output voltage

for under voltage and over voltage conditions. If an

output enters an UV/OV fault condition, the IC shuts

down all outputs for 100ms and restarts with the

programmed power up sequence. If an output is in

current limit, it is possible that its voltage can drop below

the UV threshold which also shuts down all outputs. If

that behavior is not desired, mask the appropriate fault

bit. Each output still provides its real-time UV/OV fault

status via its fault flag, even if the fault is masked.

Masking an OV/UV fault just prevents the fault from

being reported via the IRQ pin. A UV/OV fault condition

pulls the nRESET pin low. Note that the IC’s specific

CMI sets the defaults for which regulators mask the UV

and OV fault conditions.

The under-voltage condition on the output of each

regulator is reported via a Power OK or POK signal

which is high only when the regulator output is typically

within 90% to 110% of the target regulation voltage. The

POK signal from each regulator can be used for

sequencing other regulators in a programmable order to

ensure safe turn on and turn off. It can also be used to

drive a GPIO output.

Watch-Dog Supervision

The ACT86600 features a watchdog supervisory

function to reset the system if the host microprocessor

locks up. The 8s internal watchdog timer is enabled by

setting either of the I2C bits WDSREN [] or WDPCEN []

to 1. WDSREN stands for Watch Dog Soft Reset Enable

and WDPCEN stands for Watch Dog Power Cycle

Enable. Once enabled, the 8s watchdog timer is reset

whenever there is I2C activity. If no I2C transaction is

detected for 8s, the watchdog timer expires and the

PMU either performs a soft-reset or power cycle,

depending on whether WDSREN [] or WDPCEN [] bit is

set. If the IC performs a soft-reset, it toggles the

nRESET pin, but the IC retains the latest programmed

I2C settings. If the IC performs a power cycle, all outputs

turn off and the IC restarts with the default I2C register

settings.

Software-Initiated Power Cycle

ACT86600 supports a software-initiated power cycle.

This power cycle is initiated by setting the MR [] bit to 1.

This power cycle turns off all outputs and transitions the

state machine to the RESET State. Note that this resets

the MR bit back to 0.

Output Current Limit

The ACT86600 incorporates a three-level overcurrent

protection scheme for the buck converters and a single

level scheme for the LDOs. For the buck converters, the

overcurrent current threshold refers to the peak switch

current.

The first protection level is when a buck

converter’s peak switch current reaches 80% of the

Cycle-by-Cycle current limit threshold for greater than

16 switching cycles. Under this condition, the IC reports

the fault via the appropriate fault flag bit. If the fault is

unmasked, it asserts the nIRQ pin. The next level is

when the current increases to the Cycle-by-Cycle

threshold. The buck converter limits the peak switch

current in each switching cycle. This reduces the

effective duty cycle and causes the output voltage to

drop, potentially creating an undervoltage condition.

When the overcurrent condition results in an UV

condition, and UV is not masked, the IC turns off all

supplies for 100ms and restarts. The third level is when

the peak switch current reaches 122% of the Cycle-by-

Cycle current limit threshold. This immediately shuts

down the regulator and waits 14ms before restarting.

The overcurrent fault limits for the buck converters are

adjustable via I2C. Overcurrent fault reporting can be

masked via I2C, but the overcurrent limits are always

active and will shut down the IC when exceeded.

Thermal Warning and Thermal Shutdown

The ACT86600 monitors its internal die temperature

and reports a warning via nIRQ when the temperature

rises above the Thermal Interrupt Threshold of typically

135 deg C. It reports a fault when the temperature rises

above the Thermal Shutdown Temperature of typically

155 deg C. A temperature fault shuts down all outputs

unless the fault is masked. Both the fault and the

warning can be masked via I2C. The temperature

warning and fault flags still provide real-time status even

if the faults are masked. Masking just prevents the faults

from being reported via the nIRQ pin.

PIN DESCRIPTIONS

Many of the ACT86600 input and output pins are

configurable via CMI configurations. The following

descriptions refer to basic pin functions and capabilities.

Refer to the CMI Options section in the back of the

datasheet for specific pin functionality for each CMI.

VINx

VINx pins are the dedicated input power to the buck

converters. Each buck converter’s input can be

connected to a different voltage to optimize system level

performance if desired. Each VINx undervoltage

threshold is fixed at ~2.9V rising and ~2.7V falling. The

ACT86600 Datasheet(PDF) 39 Page - Qorvo, Inc

ACT86600 Datasheet(HTML) 39 Page - Qorvo, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL