TSL25723 datasheet(19/41 Pages) OSRAM

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[v2-00] 2022-Nov-30

TSL2572 − Principles O f Operation

I²C Protocol

Interface and control are accomplished through an I²C serial

compatible interface (standard or fast mode) to a set of registers

that provide access to device control functions and output data.

The devices support the 7-bit I²C addressing protocol.

The I²C standard provides for three types of bus transaction:

read, write, and a combined protocol (see Figure 20). During a

write operation, the first byte written is a command byte

followed by data. In a combined protocol, the first byte written

is the command byte followed by reading a series of bytes. If a

read command is issued, the register address from the previous

command will be used for data access. Likewise, if the MSB of

the command is not set, the device will write a series of bytes

at the address stored in the last valid command with a register

address. The command byte contains either control information

or a 5-bit register address. The control commands can also be

used to clear interrupts.

The I²C bus protocol was developed by Philips (now NXP). For

a complete description of the I²C protocol, please review the

NXP I²C design specification at

https://www.i2c-bus.org/references/

Figure 20:

I²C Protocols

Acknowledge (0)

Not Acknowledged (1)

Stop Condition

Read (1)

Start Condition

Master-to-Slave

Slave-to-Master

Repeated Start Condition

Write (0)

…

Communication of Protocol

2C Write Protocol

Command Code

Data Byte

Slave Address

2C Read Protocol

2C Read Protocol – Combined Format

Data

Command Code

Slave Address

111

Data

Slave Address

Data

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