AD8146ACPZ-R2 datasheet(7/24 Pages) AD

7 / 24 page

AD8146/AD8147/AD8148

Rev. 0 | Page 7 of 24

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Supply Voltage

11 V

All VOCM

±VS

Power Dissipation

See Figure 3

Input Common-Mode Voltage

±VS

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +85°C

Lead Temperature (Soldering, 10 sec)

300°C

Junction Temperature

150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or

any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, θJA is

specified for the device soldered in a circuit board in still air.

Table 4. Thermal Resistance with the Underside Pad

Connected to the Plane

Package Type/PCB Type

θJA

Unit

24-Lead LFCSP/4-Layer

°C/W

Maximum Power Dissipation

The maximum safe power dissipation in the AD8146/

AD8147/AD8148 package is limited by the associated rise in

junction temperature (TJ) on the die. At approximately 150°C,

which is the glass transition temperature, the plastic changes its

properties. Even temporarily exceeding this temperature limit

can change the stresses that the package exerts on the die,

permanently shifting the parametric performance of the

AD8146/AD8147/AD8148. Exceeding a junction temperature

of 175°C for an extended time can result in changes in the

silicon devices, potentially causing failure.

The power dissipated in the package (PD) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

power is the voltage between the supply pins (VS) times the

quiescent current (IS). The load current consists of differential

and common-mode currents flowing to the loads, as well as

currents flowing through the internal differential and common-

mode feedback loops. The internal resistor tap used in the

common-mode feedback loop places a 4 kΩ differential load on

the output. Differential feedback, network resistor values are

given in the Theory of Operation section and Applications

section. RMS output voltages should be considered when

dealing with ac signals.

Airflow reduces θJA. In addition, more metal directly in contact

with the package leads from metal traces, through holes,

ground, and power planes reduces the θJA. The exposed paddle

on the underside of the package must be soldered to a pad on

the PCB surface that is thermally connected to a ground plane

to achieve the specified θJA.

Figure 3 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 24-lead LFCSP

(57°C/W) package on a JEDEC standard 4-layer board with the

underside paddle soldered to a pad that is thermally connected

to a ground plane. θJA values are approximations.

3.5

–40

–20

AMBIENT TEMPERATURE (°C)

3.0

2.5

2.0

1.5

1.0

0.5

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

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