© 2005 Microchip Technology Inc.

DS80222B-page 3

PIC18F2525/2620/4525/4620

7.

Module: Timing Diagrams and

Specifications

Table 26-6: External Clock Timing Requirements

(page 343), has been revised (changes and

additions are shown in bold text).

TABLE 26-6:

EXTERNAL CLOCK TIMING REQUIREMENTS

8.

Module: EUSART

The RX pin sampling information in Section 18.1.2

“Sampling” has changed. This section now reads

as follows:

18.1.2

SAMPLING

The data on the RX pin is sampled three times by a

majority detect circuit to determine if a high or a low

level is present at the RX pin when SYNC is clear or

when BRG16 and BRGH are both not set.

The data on the RX pin is sampled once when SYNC is

set or when BRGH16 and BRGH are both set.

9.

Module: MSSP

In Section 17.3.2 “Operation”, the following note

has been added:

10. Module: QFN

In the QFN pin diagram on page 3 and in

Table 1-3:

PIC18F4525/4620

Pinout

I/O

Descriptions, the following note has been added:

Note:

It is recommended to connect the bottom

Param.

No.

Symbol

Characteristic

Min

Max

Units

Conditions

1A

DC

1

MHz

XT, RC Oscillator mode

DC

25

MHz

HS Oscillator mode

DC

31.25

kHz

LP Oscillator mode

DC

40

MHz

EC Oscillator mode

DC

4

MHz

RC Oscillator mode

0.1

4

MHz

XT Oscillator mode

4

25

MHz

HS Oscillator mode

4

10

MHz

HS + PLL Oscillator mode

5

200

kHz

LP Oscillator mode

1000

—

ns

XT, RC Oscillator mode

40

—

ns

HS Oscillator mode

32

—

μs

LP Oscillator mode

25

—

ns

EC Oscillator mode

250

—

ns

RC Oscillator mode

250

1

μs

XT Oscillator mode

40

250

ns

HS Oscillator mode

100

250

ns

HS + PLL Oscillator mode

5

200

μs

LP Oscillator mode

Note 1:

except PLL. All specified values are based on characterization data for that particular oscillator type under

standard operating conditions with the device executing code. Exceeding these specified limits may result

in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested

to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock

input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.

Note:

The SSPBUF register cannot be used with

read-modify-write instructions, such as

BCF, BTFSC, COMF

, etc.