56F8000 datasheet(39/160 Pages) FREESCALE

39 / 160 page

EOnCE Memory Map

56F8025 Data Sheet, Rev. 3

Freescale Semiconductor

Preliminary

Figure 4-1 Dual Port RAM

4.5 EOnCE Memory Map

Figure 4-5 lists all EOnCE registers necessary to access or control the EOnCE.

1. All addresses are 16-bit Word addresses.

2. This RAM is shared with Program space starting at P: $00 8000; see Figure 4-1.

Table 4-5 EOnCE Memory Map

Address

X:$FF FFFF

OTX1 / ORX1

Transmit Register Upper Word

Receive Register Upper Word

X:$FF FFFE

OTX / ORX (32 bits)

Transmit Register

Receive Register

X:$FF FFFD

OTXRXSR

Transmit and Receive Status and Control Register

X:$FF FFFC

OCLSR

Core Lock / Unlock Status Register

X:$FF FFFB - X:$FF FFA1

Reserved

X:$FF FFA0

OCR

Control Register

X:$FF FF9F

Instruction Step Counter

X:$FF FF9E

OSCNTR (24 bits)

Instruction Step Counter

X:$FF FF9D

OSR

Status Register

X:$FF FF9C

OBASE

Peripheral Base Address Register

X:$FF FF9B

OTBCR

Trace Buffer Control Register

X:$FF FF9A

OTBPR

Trace Buffer Pointer Register

X:$FF FF99

Trace Buffer Register Stages

X:$FF FF98

OTB (21 - 24 bits/stage) Trace Buffer Register Stages

X:$FF FF97

Breakpoint Unit Control Register

Reserved

RAM

Reserved

Flash

Reserved

EOnCE

Peripherals

Reserved

RAM

Dual Port RAM

Program

Data

56F8000 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

56F8000 Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL