33790 datasheet(6/12 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33790

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 4. Dynamic Electrical Characteristics

Characteristics noted under conditions 4.75 V

≤ V

DD ≤ 5.25 V, 8.0 V ≤ VSUP ≤ 25.0 V, -40°C ≤ TJ ≤ 150°C unless otherwise

noted.

Characteristic

Symbol

Min

Typ

Max

Unit

MICROCONTROLLER INTERFACE

Microcontroller Signal Cycle Time

tCYC

6.6

–

1000

µs

Microcontroller Signal Low Time

tCYCL

2.0

–

667

µs

Microcontroller Signal High Time

tCYCH

2.0

–

667

µs

Microcontroller Signal Duty Cycle for Logic Zero

DCLO

Microcontroller Signal Duty Cycle for Logic One

DCHI

60.0

66.7

72.0

Microcontroller Signal Slew Time (6)

tSLEW

–

500

Frame Start to Signal Delay Time

tDLY1

tcyc-0.1

tcyc

tcyc+0.1

µs

Signal End to Frame End Delay Time

tDLY2

1.0

–

µs

Rise Time (6)

tRISE

–

100

Fall Time (6)

tFALL

–

100

BUS TRANSMITTER

Idle to Frame and Frame to Idle Slew Rate

≤ 5.0 nF

tSLEW(FRAME)

3.0

6.0

10.0

µs

Signal High to Low and Signal Low to High Slew Rate

≤ 5.0 nF

tSLEW(SIGNAL)

3.0

4.5

8.0

µs

Data Valid (VSUPx = 25 V, CL ≤ 5.0 nF)

DSIxF, VIN(TH) to DSIxO = 5.3 V

DSIxS, VIN(TH) to DSIxO = 2.6 V

DSIxS, VIN(TH) to DSIxO = 3.4 V

DSIxF, VIN(TH) to DSIxO = 7.0 V

tDVLD1

tDVLD2

tDVLD3

tDVLD4

2.44

0.25

–

6.56

1.3

µs

BUS RECEIVER

Receiver Delay Time

tDRH: I = IRH to DSIxR = 2.5 V

tDRL: I = IRH to DSIxR = 2.5 V

tDRH

tDRL

–

400

750

Notes

Slew times and rise and fall times between 10% and 90% of output high and low levels.

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