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SA5777AD Datasheet(PDF) 5 Page - NXP Semiconductors |
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SA5777AD Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 12 page  Philips Semiconductors Product specification SA5777A Dual air-core gauge driver 1999 Sep 20 5 DC ELECTRICAL CHARACTERISTICS VBB = 7.5 to 18 V; VCC = 4.5 to 5.5 V; TA = –40 to +85°C. SYMBOL PARAMETER TEST CONDITIONS LIMITS UNIT SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VBB Analog supply voltage 7.5 18 V IIGN Analog supply current VIGN = 18 V no load VBB = 18 V with load RC1 = RC2 = RLMIN 30 235 mA ICC Logic supply current VCC = 5.5 V 1.0 mA VOH Output high voltage Data out IOH = 800 µA VCC – 0.8 VOL Output low voltage Data out IOL = 1.5 mA 0.4 V VOL Status ST, IOL = 2.5 mA 0.8 V IOH Status ST, VO (ST) = VCC 25 µA VIH Input high voltage CS, SCLK, DATAIN, OE 0.7 x VCC V VIL Input low voltage CS, SCLK, DATAIN, OE 0.3 x VCC V IIH Input high current CS, SCLK, DATAIN, VIN = 0.7 x VCC 1 µA IIL Input low current CS, SCLK, DATAIN, VIN = 0.3 x VCC 1 µA ACC Output function accuracy2 RC1 = RC2 = RLMIN ±1 Degree ISD Output shut-down current C1+, C1–, C2+, C2–, COM ISINK VBB = VBB (MAX) VBB = VBB (MIN) ISOURCE VBB = VBB (MAX) VBB = VBB (MIN) 85 43 85 43 500 300 500 300 mA mA mA mA VDRIVE Differential coil drive voltage1 VBB = VBB (MAX) RL = RL (MIN) 0.7 x VBB 0.8 x VBB V RLMIN Minimum load resistance TA = 85°C TA = 25°C TA = –40°C 215 171 138 Ω Ω Ω VBIAS Bias voltage3 IOB (Source or Sink) RL = RL (MIN) 0.475 x VBB 0.525 x VBB V NOTE: 1. VDRIVE is the maximum voltage that is applied across the coil, it is equal to (C1+) – (C1–) or (C2+) – (C2–). 2. In reference to nominal values in Figure 4. (Based on 7+ bit DAC). 3. Output Angle (0) + tan–1 (C ))–(C–) V BB –VBIAS AC ELECTRICAL CHARACTERISTICS VDD = 7.5 to 18 V; VCC = 4.5 to 5.5 V; TA = –40 to +85°C SYMBOL PARAMETER TEST CONDITIONS LIMITS UNIT SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FSCLK Input frequency 1.60 MHz TSCLKH SCLK high time 175 ns TSCLKL SCLK low time VCC = 5.5 V 175 ns TRO Output rise time DO 0.75 to VCC –1.2 V, CL = 90 pF 75 ns TFO Output fall time DO VCC –1.2 V to 0.75, CL = 90 pF 75 ns TSU DI set-up time 75 ns THI DI hold time 75 ns TCSH Time before first SCLK rising edge 75 ns TCSL Time after last SCLK falling edge 75 ns |
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