| Electronic Components Datasheet Search |
|
XRT86VL32IB Datasheet(PDF) 49 Page - Exar Corporation |
|
|
|||||||||||||||||||||||||||||
XRT86VL32IB Datasheet(HTML) 49 Page - Exar Corporation |
|
49 / 174 page ![]() XRT86VL32 44 REV. V1.2.0 DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION TABLE 26: GAPPED CLOCK CONTROL REGISTER (GCCR) HEX ADDRESS: 0Xn11E BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION 7 FrOutclk R/W 0 Framer Output Clock Reference This bit is used to enable or disable high-speed T1/E1 rate on the T1OSCCLK and the E1OSCCLK output pins. By default, the output clock reference on T1OSCCLK and E1OSCCLK output pins is 1.544MHz/2.048MHz respectively. By set- ting this bit to a “1”, the output clock reference on the T1OSCLK and the E1OSCCLK is 49.408MHz/65.536MHz for T1/E1 respectively. 0 = Disables high-speed rate to be output on the T1OSCCLK and E1OSCCLK output pins. Standard T1/E1 Rate - 1.544MHz/2.048Mhz will be output to the T1OSCCLK and E1OSCCLK output pins respec- tively. 1 = Enables high-speed rate to be output on the T1OSCCLK and E1OSCCLK output pins. 6-0 Reserved - - Reserved |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |