2-692
RF5144
Rev A0 060214
Pin
Function
Description
Interface Schematic
1VREG_PCS Regulated voltage supply for PCS band amplifier bias circuit. In power
down mode, both VREG_PCS and VMODE_PCS need to be LOW (<0.5V).
2RFIN_PCS
PCS band RF input internally matched to 50
Ω. This input is internally
AC-coupled.
3
VREG_Cell
Regulated voltage supply for Cell band amplifier bias circuit. In power
down mode, both VREG_Cell and VMODE_Cell need to be LOW (<0.5V).
4VMODE_
Cell
Cell band mode control pin. For nominal operation (High Power mode),
VMODE_Cell is set LOW. When set HIGH, devices are biased lower to
improve efficiency.
5
RFIN_Cell
Cell band RF input internally matched to 50
Ω. This input is internally
AC-coupled.
6
VCC1_Cell
Cell band first stage collector supply. A 2200uF and a 4.7
μF decou-
pling capacitors are required.
7NC
No connection. Do not connect this pin to any external circuit.
8NC
No connection. Do not connect this pin to any external circuit.
9
VCC2_Cell
Cell band output stage collector supply. Please see the schematic for
required external components.
10
VCC2_Cell
Same as Pin 9.
11
VCC2_Cell
Same as Pin 9.
12
NC
No connection. Do not connect this pin to any external circuit.
13
NC
No connection. Do not connect this pin to any external circuit.
14
RFOUT_Cell Cell band RF output. Internally AC-coupled.
15
NC
No connection. Do not connect this pin to any external circuit.
16
RFOUT_
PCS
PCS band RF output. Internally AC-coupled.
17
NC
No connection. Do not connect this pin to any external circuit.
18
NC
No connection. Do not connect this pin to any external circuit.
19
VCC2_PCS
PCS band output stage collector supply. Please see the schematic for
required external components.
20
VCC2_PCS
Same as Pin 19.
21
VCC2_PCS
Same as Pin 19.
22
VCC1_PCS
PCS band first stage collector supply. A 4.7
μF decoupling capacitor is
required.
23
VCC BIAS
Bias circuit supply voltage.
24
VMODE_
PCS
PCS band mode control pin. For nominal operation (High Power mode),
VMODE_PCS is set Low. When set HIGH, devices are biased lower to
improve efficiency.
Pkg
Base
GND
The backside of the package should be soldered to a top side ground
pad which is connected to the ground plane with multiple vias. The pad
should have a short thermal path to the ground plane.
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