3 of 8
RF5222
Rev A0 DS070717
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Package Drawing
Pin
Function
Description
1RF IN
RF input. Input is matched to 50
Ω and DC block is provided internally.
2VREG
Bias current control voltage for the first and second amplifier stage.
3PDETECT or
NC
Power detector which provides an output voltage proportional to the RF output power level. May need external
decoupling capacitor for PDETECT load sensitivity. May need external circuitry to bring output voltage to desired
level.
May be left unconnected if function is not desired.
4NC
This pin may be left unconnected or may be connected to ground.
5RF OUT
RF output. A DC blocking capacitor may be needed as this pin of the PA is a DC short to ground.
6VC2
Voltage supply for second stage amplifier. External low frequency bypass capacitors should be connected if no
other low frequency decoupling is employed.
7VC1
Voltage supply for the first amplifier stage. External low frequency bypass capacitors should be connected if no
other low frequency decoupling is employed.
8VCC
Supply voltage for the bias reference and control circuit. May be connected with VC1 and VC2 (with a single sup-
ply voltage). The 56pF bypass capacitor should be placed as close as possible to the IC for the best perfor-
mance.
Pkg
Base
GND
The center metal base of the QFN package provides DC and RF ground as well as heat sink for the amplifier.
0.05
0.00
0.152
REF
0.50
0.40
-C-
SEATING
PLANE
INDEX
AREA
-B-
-A-
2.20
2.20
2 PLCS
0.10 C
2 PLCS
0.10 C
0.10
MAX
C AB
0.10 M
0.31
0.21
0.65
0.28
0.18
1.20
1.00
TYP
Dimensions in mm.
Shaded lead is pin 1.
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