SCN2681 datasheet(13/30 Pages) PHILIPS

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Philips Semiconductors

Product specification

SCN2681

Dual asynchronous receiver/transmitter (DUART)

1998 Sep 04

MR2A – Channel A Mode Register 2

MR2A is accessed when the Channel A MR pointer points to MR2,

which occurs after any access to MR1A. Accesses to MR2A do not

change the pointer.

MR2A[7:6] – Channel A Mode Select

Each channel of the DUART can operate in one of four modes.

MR2A[7:6] = 00 is the normal mode, with the transmitter and

receiver operating independently. MR2A[7:6] = 01 places the

channel in the automatic echo mode, which automatically

re-transmits the received data. The following conditions are true

while in automatic echo mode:

1. Received data is re-clocked and retransmitted on the TxDA out-

put.

2. The receive clock is used for the transmitter.

3. The receiver must be enabled, but the transmitter need not be

enabled.

4. The Channel A TxRDY and TxEMT status bits are inactive.

5. The received parity is checked, but is not regenerated for trans-

mission, i.e. transmitted parity bit is as received.

6. Character framing is checked, but the stop bits are retransmitted

as received.

7. A received break is echoed as received until the next valid start

bit is detected.

8. CPU to receiver communication continues normally, but the CPU

to transmitter link is disabled.

Two diagnostic modes can also be configured. MR2A[7:6] = 10

selects local loopback mode. In this mode:

1. The transmitter output is internally connected to the receiver

input.

2. The transmit clock is used for the receiver.

3. The TxDA output is held High.

4. The RxDA input is ignored.

5. The transmitter must be enabled, but the receiver need not be

enabled.

6. CPU to transmitter and receiver communications continue nor-

mally.

The second diagnostic mode is the remote loopback mode, selected

by MR2A[7:6] = 11. In this mode:

1. Received data is re-clocked and re-transmitted on the TxDA

output.

2. The receive clock is used for the transmitter.

3. Received data is not sent to the local CPU, and the error status

conditions are inactive.

4. The received parity is not checked and is not regenerated for

transmission, i.e., transmitted parity is as received.

5. The receiver must be enabled.

6. Character framing is not checked and the stop bits are retrans-

mitted as received.

7. A received break is echoed as received until the next valid start

bit is detected.

The user must exercise care when switching into and out of the

various modes. The selected mode will be activated immediately

upon mode selection, even if this occurs in the middle of a received

or transmitted character. Likewise, if a mode is deselected the

device will switch out of the mode immediately. An exception to this

is switching out of autoecho or remote loopback modes: if the

deselection occurs just after the receiver has sampled the stop bit

(indicated in autoecho by assertion of RxRDY), and the transmitter

is enabled, the transmitter will remain in autoecho mode until the

entire stop has been retransmitted.

MR2A[5] – Channel A Transmitter Request-to-Send Control

CAUTION: When the transmitter controls the OP pin (usually used

for the RTSN signal) the meaning of the pin is not RTSN at all!

Rather, it signals that the transmitter has finished the transmission

(i.e., end of block).

This bit allows deactivation of the RTSN output by the transmitter.

This output is manually asserted and negated by the appropriate

commands issued via the command register. MR2[5] set to 1

caused the RTSN to be reset automatically one bit time after the

character(s) in the transmit shift register and in the THR (if any) are

completely transmitted (including the programmed number of stop

bits) if a previously issued transmitter disable is pending. This

feature can be used to automatically terminate the transmission as

follows:

1. Program the auto-reset mode: MR2[5]=1

2. Enable transmitter, if not already enabled

3. Assert RTSN via command

4. Send message

5. After the last character of the message is loaded to the THR,

disable the transmitter. (If the transmitter is underrun, a special

case exists. See note below.)

6. The last character will be transmitted and the RTSN will be reset

one bit time after the last stop bit is sent.

NOTE: The transmitter is in an underrun condition when both the

TxRDY and the TxEMT bits are set. This condition also exists

immediately after the transmitter is enabled from the disabled or

reset state. When using the above procedure with the transmitter in

the underrun condition, the issuing of the transmitter disable must be

delayed from the loading of a single, or last, character until the

TxRDY becomes active again after the character is loaded.

MR2A[4] – Channel A Clear-to-Send Control

If this bit is 0, CTSAN has no effect on the transmitter. If this bit is a

1, the transmitter checks the state of CTSAN (IPO) each time it is

ready to send a character. If IPO is asserted (Low), the character is

transmitted. If it is negated (High), the TxDA output remains in the

marking state and the transmission is delayed until CTSAN goes

Low. Changes in CTSAN while a character is being transmitted do

not affect the transmission of that character..

MR2A[3:0] – Channel A Stop Bit Length Select

This field programs the length of the stop bit appended to the

transmitted character. Stop bit lengths of .563 TO 1 AND .563 to 2

bits. In increments of 0.625 bit, can be programmed for character

lengths of 6, 7, and 8 bits. For a character lengths of 5 bits, 1.0625

to 2 stop bits can be programmed in increments of .0625 bit.

The receiver only checks for a ‘mark’ condition at the center of the

first stop bit position (one bit time after the last data bit, or after the

parity bit is enabled) in all cases.

If an external 1X clock is used for the transmitter, MR2A[3] = 0

selects one stop bit and MR2A[3] = 1 selects two stop bits to be

transmitted.

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