LT1116CS8 datasheet(3/8 Pages) LINER

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LT1116

1116fb

SYMBOL

PARAMETERS

CONDITIONS

MIN

TYP

MAX

UNITS

VIH

+ Positive Latch Threshold

●

2.0

VIL

– Latch Threshold

●

0.8

IIL

Latch Input Current

VLATCH = 0V

●

–20

–500

µA

tPD

Propagation Delay

∆VIN = 100mV, OD = 5mV (Note 4)

●

tPD

Propagation Delay

∆VIN = 100mV, OD = 20mV (Note 4)

●

∆tPD

Differential Propagation Delay

∆VIN = 100mV, OD = 5mV (Note 4)

tSU

Latch Set-Up Time

(Note 5)

Latch Hold Time

(Note 5)

ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over full operating temperature

range, otherwise specifications are at TA = 25°C. V+ = 5V, V+ = –5V, VOUT = (Q) = I .4V, LATCH = 0V, unless noted.

Note 4: tPD and ∆tPD cannot be measured in automatic handling

equipment with low values of overdrive. The LT1116 is sample tested with

a 1V step and 500mV overdrive. Correlation tests have shown that tPD and

∆tPD can be guaranteed with this test if additional DC tests are performed

to verify internal bias conditions are correct. For low overdrive conditions

VOS is added to the measured overdrive.

Note 5: Input latch set-up time, tSU, is the interval in which the input signal

must be stable prior to asserting the latch signal. The hold time,

tH, is the interval after the latch is asserted in which the input signal must

be stable.

Gain CharacteristIcs

Propagation Delay

vs Load Capacitance

Propagation Delay vs Overdrive

DIFFERENTIAL INPUT VOLTAGE (mV)

– 2.5

2.5

3.0

4.0

3.5

2.5

1.5

0.5

5.0

4.5

2.0

1.0

– 1.5

1.5

– 0.5

0.5

LT1116 • TPC01

VS = ±5V

IOUT = 0

TJ = 125°C

TJ = –55°C

TJ = 25°C

OVERDRIVE VOLTAGE (mV)

LT1116 • TPC02

TJ = 25°C

STEP SIZE = 100mV

tPDLH

tPDHL

OUTPUT LOAD CAPACITANCE (pF)

LT1116 • TPC03

STEP = 100mV, OVERDRIVE = 5mV

tPDLH

tPDHL

TYPICAL PERFOR A CE CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliabilty and lifetime.

Note 2: Input offset voltage is defined as the average of two offset

voltages measured by forcing first the Q output to 1.4V then forcing

the Q output to 1.4V.

Note 3: Input bias current is defined as the average of the two input

currents.

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