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MP28162GC Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP28162GC Datasheet(HTML) 3 Page - Monolithic Power Systems |
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3 / 21 page ![]() MP28162 – SINGLE-INDUCTOR, BUCK-BOOST CONVERTER WITH 1.5A MOSFETS MP28162 Rev. 1.0 MonolithicPower.com 3 3/16/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description A1 EN On/off control. Pull the EN pin high to enable the MP28162; pull EN low or float the pin to disable all internal circuits. EN is pulled down to AGND with an internal , 1.5MΩ resistor. A2, A3 VIN Supply voltage for power stage. B1 MODE/ SYNC Operation mode selection. If the MODE/SYNC pin is low, the MP28162 switches between pulse-skip mode and fixed-frequency pulse-width modulation (PWM) mode automatically, based on the load level. If MODE/SYNC is high, the MP28162 works in fixed-frquency PWM mode continuously. An external clock can be applied to MODE/SYNC for switching frequency (fREQ) synchronization. MODE/SYNC is pulled down to AGND with an internal, 1MΩ resistor. Pull MODE/SYNC high or low via a resistor below 10kΩ. B2, B3 SW1 Switch 1. Internal switches are connected to the SW1 pin. Connect an inductor between the SW1 and SW2 pins. C1 VCC Supply voltage for control stage. The VCC pin is powered by the higher value between the input voltage (VIN) and output voltage (VOUT). Decouple VCC using a 4.7 μF capacitor. C2, C3 PGND Power ground. D1 AGND Signal ground. D2, D3 SW2 Switch 2. Internal switches are connected to the SW2 pin. Connect an inductor between the SW1 and SW2 pins. E1 FB Output voltage feedback. Keep the FB pin and its associated traces far from noise sources such as SW1 and SW2. E2, E3 VOUT Buck-boost converter output. Place an output capacitor (COUT) close to the VOUT and PGND pins. ABSOLUTE MAXIMUM RATINGS (1) VIN to GND .....................................-0.3V to +6V SW1, SW2 to GND .......... -0.3V (-1.5V for <5ns) ………………………...to +6.5V (+7.5V for <5ns) All other pins ...................................-0.3V to +6V Junction temperature ................................150°C Lead temperature .....................................260°C Continuous power dissipation (TA = 25°C) (2) WLCSP-15 (1.3mmx2.1mm)................ 2.23W (5) Storage temperature ................ -65°C to +150°C ESD Ratings Human body model (HBM) .................... ±2000V Charged device model (CDM) .............. ±1000V Recommended Operating Conditions (3) Start-up supply voltage (VST) ..........1.8V to 5.5V Operating voltage (VIN) ............... 1.2V to 5.5V (4) Output voltage (VOUT)......................1.5V to 5.5V Operating junction temp (TJ).....-40°C to +125°C Thermal Resistance θJA θJC WLCSP-15(1.3mmx2.1mm) EVL28162-C-00A (5) .......... 56 ....... 1.... °C/W JESD51-7 (6) .......... 94 ...... 1.7 .. °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to- ambient thermal resistance, θ JA, and the ambient temperature, TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can produce an excessive die temperature, which may cause the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) If VCC is powered from a source exceeding 1.8V (such as VOUT), the MP28162 can operate with VIN as low as 1.2V, but the load capability is lower when VIN = 1.2V due to the high RDS(ON) of SWA and low current limit. 5) Measured on the EVL28162-C-00A, a 2-layer, 1oz PCB (51mmx51mm). 6) The θ JA value given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51-7, and simulated on a specified JEDEC board. They do not represent the performance obtained in an actual application. |
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