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TDA6405ATS Datasheet(PDF) 6 Page - NXP Semiconductors |
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TDA6405ATS Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 32 page  1999 Jan 13 6 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A Fig.2 Pin configuration for TDA6404. handbook, halfpage UHFIN1 UHFIN2 VHFIN RFGND IFFIL1 IFFIL2 PVHFL PVHFH PUHF AS SDA SCL ADC CP VHFOSCIB2 GND IFOUT2 IFOUT1 VCC XTAL VT 1 2 3 4 5 6 7 8 9 10 11 12 13 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 TDA6404 MGK830 UHFOSCIB1 UHFOSCOC1 UHFOSCOC2 UHFOSCIB2 VHFOSCIB1 VHFOSCOC2 VHFOSCOC1 handbook, halfpage UHFIN1 UHFIN2 VHFIN RFGND IFFIL1 IFFIL2 PVHFL PVHFH PUHF AS SDA SCL ADC VT VHFOSCIB2 GND IFOUT2 IFOUT1 VCC XTAL CP 1 2 3 4 5 6 7 8 9 10 11 12 13 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 TDA6405 TDA6405A MGK831 UHFOSCIB1 UHFOSCOC1 UHFOSCOC2 UHFOSCIB2 VHFOSCIB1 VHFOSCOC2 VHFOSCOC1 Fig.3 Pin configuration for TDA6405(A) FUNCTIONAL DESCRIPTION The devices are controlled via the I2C-bus. For programming, there is one module address (7 bits) and the R/W bit for selecting the read or write mode. Write mode Data bytes can be sent to the devices after the address transmission (first byte) by setting the R/W bit to logic 0. Four data bytes are needed to fully program the devices. The I2C-bus transceiver has an auto-increment facility which permits the programming of the devices within one single transmission (address + 4 data bytes). The devices can also be partially programmed, providing that the first data byte following the address is divider byte 1 (DB1) or control byte (CB). The bits in the data bytes are defined in Tables 1 and 2. The first bit of the data byte transmitted indicates whether frequency data (first bit = 0) or control and band switch data (first bit = 1) will follow. Until an I2C-bus STOP condition is sent by the controller, additional data bytes can be entered without the need to re-address the devices. The frequency register is loaded after the 8th clock pulse of the second divider byte (DB2). The control register is loaded after the 8th clock pulse of the CB. The band switch register is loaded after the 8th clock pulse of the band switch byte (BB). |
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