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MCP3004-I/ST Datasheet(PDF) 19 Page - Microchip Technology |
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MCP3004-I/ST Datasheet(HTML) 19 Page - Microchip Technology |
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19 / 34 page ![]() © 2007 Microchip Technology Inc. DS21295C-page 19 MCP3004/3008 6.2 Maintaining Minimum Clock Speed When the MCP3004/3008 initiates the sample period, charge is stored on the sample capacitor. When the sample period is complete, the device converts one bit for each clock that is received. It is important for the user to note that a slow clock rate will allow charge to bleed off the sample capacitor while the conversion is taking place. At 85°C (worst case condition), the part will maintain proper charge on the sample capacitor for at least 1.2 ms after the sample period has ended. This means that the time between the end of the sample period and the time that all 10 data bits have been clocked out must not exceed 1.2 ms (effective clock frequency of 10 kHz). Failure to meet this criterion may introduce linearity errors into the conversion outside the rated specifications. It should be noted that during the entire conversion cycle, the A/D converter does not require a constant clock speed or duty cycle, as long as all timing specifications are met. 6.3 Buffering/Filtering the Analog Inputs If the signal source for the A/D converter is not a low impedance source, it will have to be buffered or inaccu- rate conversion results may occur (see Figure 4-2). It is also recommended that a filter be used to eliminate any signals that may be aliased back in to the conversion results, as is illustrated in Figure 6-3, where an op amp is used to drive, filter and gain the analog input of the MCP3004/3008. This amplifier provides a low imped- ance source for the converter input, plus a low pass filter, which eliminates unwanted high frequency noise. Low pass (anti-aliasing) filters can be designed using Microchip’s free interactive FilterLab™ software. Filter- Lab will calculate capacitor and resistors values, as well as determine the number of poles that are required for the application. For more information on filtering sig- nals, see AN699, “Anti-Aliasing Analog Filters for Data Acquisition Systems”. FIGURE 6-3: The MCP601 Operational Amplifier is used to implement a second order anti-aliasing filter for the signal being converted by the MCP3004. 6.4 Layout Considerations When laying out a printed circuit board for use with analog components, care should be taken to reduce noise wherever possible. A bypass capacitor should always be used with this device and should be placed as close as possible to the device pin. A bypass capac- itor value of 1 µF is recommended. Digital and analog traces should be separated as much as possible on the board, with no traces running under- neath the device or bypass capacitor. Extra precau- tions should be taken to keep traces with high frequency signals (such as clock lines) as far as possi- ble from analog traces. Use of an analog ground plane is recommended in order to keep the ground potential the same for all devices on the board. Providing VDD connections to devices in a “star” configuration can also reduce noise by eliminating return current paths and associated errors (see Figure 6-4). For more information on layout tips when using A/D converters, refer to AN688, “Lay- out Tips for 12-Bit A/D Converter Applications”. FIGURE 6-4: VDD traces arranged in a ‘Star’ configuration in order to reduce errors caused by current return paths. MCP3004 VDD 10 µF IN- IN+ - + VIN C1 C2 VREF 4.096V Reference 1µF 1µF 0.1 µF MCP601 R1 R2 R3 R4 MCP1541 V DD Connection Device 1 Device 2 Device 3 Device 4 |
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