TDA8366H datasheet(23/48 Pages) PHILIPS

23 / 48 page

January 1995

Philips Semiconductors

Objective speciﬁcation

I2C-bus controlled PAL/NTSC TV

processor

TDA8366

SANDCASTLE PULSE OUTPUT (PIN 37)

V37

output voltage

during burst key

4.8

5.3

5.8

during blanking

1.8

2.0

2.2

pulse width

burst key pulse

3.3

3.5

3.7

µs

vertical blanking (50 Hz)

−

lines

vertical blanking (60 Hz)

−

lines

Vclamp

clamp level for vertical guard

detection

−

2.7

−

I37(min)

minimum input current to

activate guard detection

−−

0.5

I37(max)

maximum allowable input

current

2.5

−−

delay of start of burst key to

start of sync

−

5.4

−µs

SOFT START; note 21

δdf

duty factor control range

−

tss

soft start time

−

100

−

lines

Vertical synchronization and geometry correction

VERTICAL OSCILLATOR; note 22

ffr

free running frequency

−

50/60

−

flock

locking range

−

64.5

divider value not locked

−

625/525

−

lines

locking range

488

−

722

lines/

frame

VERTICAL RAMP GENERATOR (PIN 49)

V49(p-p)

sawtooth amplitude

(peak-to-peak value)

VS = 1FH;

C = 100 nF; R = 39 k

Ω

−

3.5

−

Idis

discharge current

−

Icharge

charge current set by external

resistor

note 23

−

−µA

vertical slope

control range (63 steps)

−14

−

+14

compress mode

−

expand mode

−

133

−

∆I

charge current increase

f = 60 Hz

−

V49L

LOW level of ramp

normal or expand mode

−

2.07

−

compress mode

−

2.55

−

VERTICAL DRIVE OUTPUTS (PINS 44 AND 45)

Idiff(p-p)

differential output current

(peak-to-peak value)

VA = 1FH

−

ICM

common mode current

−

400

−µA

output voltage range

−

4.0

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

TDA8366H Datasheet(PDF) 23 Page - NXP Semiconductors

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