1999 Feb 16

9

Philips Semiconductors

Preliminary specification

12-bit high-speed Analog-to-Digital

Converter (ADC)

TDA8767

Notes to the characteristics

1. The

−3 dB (or −1 dB) analog bandwidth is determined by the 3 dB (or 1 dB) reduction in the reconstructed output,

the input being a full-scale sine wave.

2. THD (total harmonic distortion) is obtained with the addition of the first five harmonics:

F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input.

3. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale

input (square wave signal) in order to sample the signal and obtain correct output data (see Fig.5).

S/N

signal-to-noise ratio

without harmonics;

−

61

−

dB

sampling delay time

−−

2ns

output hold time

8

−−

ns

output delay time

−

12

15

ns

15

18

ns

3-state output delay times; see Fig.4

enable HIGH

−

14

18

ns

enable LOW

−

16

20

ns

disable HIGH

−

16

20

ns

disable LOW

−

14

18

ns

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

THD

20 log

F

(2nd)

2

(3rd)

2

(4th)

2

(5th)

2

(6th)

2

++

+

+

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=