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AD8571 Datasheet(PDF) 16 Page - Analog Devices

Part # AD8571
Description  Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8571 Datasheet(HTML) 16 Page - Analog Devices

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AD8571/AD8572/AD8574
Data Sheet
Rev. F | Page 16 of 28
AUTO-ZERO PHASE
In this phase, all ΦAX switches are closed, and all ΦB switches
are open. Here, the nulling amplifier is taken out of the gain
loop by shorting its two inputs together. Of course, there is a
degree of offset voltage, shown as VOSA, inherent in the nulling
amplifier, that maintains a potential difference between the +IN
and −IN inputs. The nulling amplifier feedback loop is closed
through ΦA2, and VOSA appears at the output of the nulling
amplifier and on CM1, an internal capacitor in the AD8571/
AD8572/AD8574. Mathematically, this can be expressed in the
time domain as
VOA[t] = AAVOSA[t] − BAVOA[t]
(1)
This can also be expressed as
[ ]
[ ]
A
OSA
A
OA
B
t
V
A
t
V
+
=
1
(2)
The previous equations show that the offset voltage of the nulling
amplifier times a gain factor appears at the output of the nulling
amplifier and thus on the CM1 capacitor.
AMPLIFICATION PHASE
When the ΦB switches close and the ΦAX switches open for
the amplification phase, the offset voltage remains on CM1 and
essentially corrects any error from the nulling amplifier. The
voltage across CM1 is designated as VNA. The potential difference
between the two inputs to the primary amplifier is designated as
VIN, or VIN = (VIN+ − VIN−). The output of the nulling amplifier
can then be expressed as
VOA[t] = AA(VIN[t] − VOSA[t]) − BAVNA[t]
(3)
Because ΦAX is now open and there is no place for CM1 to
discharge, the voltage (VNA) at the present time (t) is equal to
the voltage at the output of the nulling amp (VOA) at the time when
ΦAX is closed. If the period of the autocorrection switching
frequency is designated as TS, the amplifier switches between
phases every 0.5 × TS. Therefore, in the amplification phase
[ ]


 −
=
S
NA
NA
T
t
V
t
V
2
1
(4)
and substituting Equation 4 and Equation 2 into Equation 3 yields
[ ]
[ ]
[ ]
A
S
OSA
A
A
OSA
A
IN
A
OA
B
T
t
V
B
A
t
V
A
t
V
A
t
V
+


 −
−
+
=
1
2
1
(5)
For the sake of simplification, it can be assumed that the auto-
correction frequency is much faster than any potential change
in VOSA or VOSB. This is a good assumption because changes in
offset voltage are a function of temperature variation or long-
term wear time, both of which are much slower than the
auto-zero clock frequency of the AD8571/AD8572/AD8574,
which effectively makes the VOS time invariant, and Equation 5
can be rewritten as
[ ]
[ ]
(
)
A
OSA
A
A
OSA
A
A
IN
A
OA
B
V
B
A
V
B
A
t
V
A
t
V
+
−
+
+
=
1
1
(6)
or
[ ]
[ ]
+
+
=
A
OSA
IN
A
OA
B
V
t
V
A
t
V
1
(7)
Here, the auto-zeroing becomes apparent. Note that the VOS
term is reduced by a factor of 1 + BA, which shows how the
nulling amplifier has greatly reduced its own offset voltage error
even before correcting the primary amplifier. Therefore, the
primary amplifier output voltage is the voltage at the output of the
AD8571/AD8572/AD8574 amplifier. It is equal to
VOUT[t] = AB(VIN[t] + VOSB) + BBVNB
(8)
In the amplification phase, VOA = VNB, so this can be rewritten as
[ ]
[ ]
[ ]


+
+
+
+
=
A
OSA
IN
A
B
OSB
B
IN
B
OUT
B
V
t
V
A
B
V
A
t
V
A
t
V
1
(9)
Combining terms yield
[ ]
[ ]
(
)
OSB
B
A
OSA
B
A
B
A
B
IN
OUT
V
A
B
V
B
A
B
A
A
t
V
t
V
+
+
+
+
=
1
(10)
The AD8571/AD8572/AD8574 architecture is optimized in
such a way that AA = AB, BA = BB, and BA >> 1. In addition, the
gain product to AABB is much greater than AB. Therefore,
Equation 10 can be simplified to
VOUT[t] = VIN[t]AABA + AA(VOSA+ VOSB)
(11)
Most obvious is the gain product of both the primary and nulling
amplifiers. This AABA term is what gives the AD8571/AD8572/
AD8574 extremely high open-loop gain. To understand how
VOSA and VOSB relate to the overall effective input offset voltage of
the complete amplifier, set up the generic amplifier equation of
VOUT = k × (VIN + VOS, EFF)
(12)
where:
k is the open-loop gain of an amplifier.
VOS, EFF is its effective offset voltage.
Putting Equation 12 into the form of Equation 11 gives
VOUT[t] = VIN[t]AABA + VOS, EFFAABA
(13)



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