TLV2772AMFKB datasheet(41/65 Pages) TI

41 / 65 page

TLV277x, TLV277xA

FAMILY OF 2.7V HIGHSLEW RATE RAILTORAIL OUTPUT

OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004

WWW.TI.COM

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts

 Release 8, the model generation

software used with Microsim PSpice

. The Boyle macromodel (see Note 4) and subcircuit in Figure 64 are

generated using the TLV2772 typical electrical and operating characteristics at TA = 25°C. Using this

information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most

cases):

D Maximum positive output voltage swing

D Maximum negative output voltage swing

D Slew rate

D Quiescent power dissipation

D Input bias current

D Open-loop voltage amplification

D Unity-gain frequency

D Common-mode rejection ratio

D Phase margin

D DC output resistance

D AC output resistance

D Short-circuit output current limit

NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal

of Solid-State Circuits, SC-9, 353 (1974).

OUT

−

VDD +

IN −

IN+

GND

rd1

rss

iss

rd2

egnd

gcm

vlim

ro1

ro2

hlim

dlp

dln

vln

vlp

css

* TLV2772 operational amplifier macromodel subcircuit

* created using Parts release 8.0 on 12/12/97 at 10:08

* Parts is a MicroSim product.

* connections: noninverting input

| inverting input

| | positive power supply

| | | negative power supply

| | | | output

| | | | |

.subckt TLV2772

1 2 3 4 5

2.8868E-12

10.000E−12

css

2.6302E−12

dlp

dln

egnd

poly(2) (3,0) (4,0) 0 .5 .5

poly(5) vb vc ve vlp vln 0

15.513E6 −1E3 1E3 16E6 −16E6

11 12 188.50E−6

gcm

10 99 9.4472E−9

iss

145.50E−6

hlim

vlim 1K

10 jx1

10 jx2

100.00E3

rd1

5.3052E3

rd2

5.3052E3

ro1

17.140

ro2

17.140

4.5455E3

rss

1.3746E6

dc 0

dc .82001

vlim

dc 0

vlp

dc 47

vln

dc 47

.model

D(Is=800.00E−18)

.model

D(Is=800.00E−18 Rs=1m Cjo=10p)

.model

jx1

PJF(Is=2.2500E−12 Beta=244.20E−6

+ Vto=−.99765)

.model

jx2

PJF(Is=1.7500E−12 Beta=244.20E−6

+ Vto=−1.002350)

.ends

Figure 64. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

TLV2772AMFKB Datasheet(PDF) 41 Page - Texas Instruments

TLV2772AMFKB Datasheet(HTML) 41 Page - Texas Instruments

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