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PIC16F688-I/MLQTP Datasheet(PDF) 42 Page - Microchip Technology |
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PIC16F688-I/MLQTP Datasheet(HTML) 42 Page - Microchip Technology |
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42 / 202 page ![]() PIC16F688 DS41203C-page 40 © 2007 Microchip Technology Inc. 4.2.5.6 RA5/T1CKI/OSC1/CLKIN Figure 4-6 shows the diagram for this pin. The RA5 pin is configurable to function as one of the following: • a general purpose I/O • a Timer1 clock input • a crystal/resonator connection • a clock input FIGURE 4-6: BLOCK DIAGRAM OF RA5 I/O pin VDD VSS D Q CK Q D Q CK Q D Q CK Q D Q CK Q VDD D EN Q D EN Q Weak Data Bus WR WPUA RD WPUA RD PORTA WR PORTA WR TRISA RD TRISA WR IOCA RD IOCA To Timer1 or CLKGEN INTOSC Mode RD PORTA INTOSC Mode RAPU OSC2 (2) Note 1: Timer1 LP oscillator enabled. 2: When using Timer1 with LP oscillator, the Schmitt Trigger is bypassed. TMR1LPEN(1) Interrupt-on- change Oscillator Circuit Q3 |
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