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PIC16F616-I/MLQTP Datasheet(PDF) 121 Page - Microchip Technology |
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PIC16F616-I/MLQTP Datasheet(HTML) 121 Page - Microchip Technology |
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121 / 180 page ![]() © 2007 Microchip Technology Inc. Preliminary DS41288C-page 119 PIC16F610/616/16HV610/616 12.6 Watchdog Timer (WDT) The Watchdog Timer is a free running, on-chip RC oscillator, which requires no external components. This RC oscillator is separate from the external RC oscillator of the CLKIN pin and INTOSC. That means that the WDT will run, even if the clock on the OSC1 and OSC2 pins of the device has been stopped (for example, by execution of a SLEEP instruction). During normal oper- ation, a WDT time out generates a device Reset. If the device is in Sleep mode, a WDT time out causes the device to wake-up and continue with normal operation. The WDT can be permanently disabled by program- ming the Configuration bit, WDTE, as clear (Section 12.1 “Configuration Bits”). 12.6.1 WDT PERIOD The WDT has a nominal time-out period of 18 ms (with no prescaler). The time-out periods vary with temperature, VDD and process variations from part to part (see Table 15-4, Parameter 31). If longer time-out periods are desired, a prescaler with a division ratio of up to 1:128 can be assigned to the WDT under software control by writing to the OPTION register. Thus, time-out periods up to 2.3 seconds can be realized. The CLRWDT and SLEEP instructions clear the WDT and the prescaler, if assigned to the WDT, and prevent it from timing out and generating a device Reset. The TO bit in the STATUS register will be cleared upon a Watchdog Timer time out. 12.6.2 WDT PROGRAMMING CONSIDERATIONS It should also be taken in account that under worst- case conditions (i.e., VDD = Min., Temperature = Max., Max. WDT prescaler) it may take several seconds before a WDT time out occurs. FIGURE 12-2: WATCHDOG TIMER BLOCK DIAGRAM TABLE 12-7: WDT STATUS Conditions WDT WDTE = 0 Cleared CLRWDT Command Exit Sleep + System Clock = EXTRC, INTRC, EC Exit Sleep + System Clock = XT, HS, LP Cleared until the end of OST T0CKI T0SE pin CLKOUT TMR0 Watchdog Timer WDT Time-Out PS<2:0> WDTE Data Bus Set Flag bit T0IF on Overflow T0CS Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register. 0 1 0 1 0 1 SYNC 2 Cycles 8 8 8-bit Prescaler 0 1 (= FOSC/4) PSA PSA PSA 3 |
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