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DSPIC30F2012AT20E/ML Datasheet(PDF) 193 Page - Microchip Technology |
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DSPIC30F2012AT20E/ML Datasheet(HTML) 193 Page - Microchip Technology |
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193 / 205 page ![]() © 2006 Microchip Technology Inc. DS70139E-page 191 dsPIC30F2011/2012/3012/3013 APPENDIX A: REVISION HISTORY Revision D (August 2006) Previous versions of this data sheet contained Advance or Preliminary Information. They were distrib- uted with incomplete characterization data. This revision reflects these updates: • Supported I2C Slave Addresses (see Table 14-1) • ADC Conversion Clock selection to allow 200 kHz sampling rate (see Section 16.0 “12-bit Analog-to-Digital Converter (ADC) Module”) • Operating Current (IDD) Specifications (see Table 20-5) • Idle Current (IIDLE) Specifications (see Table 20-6) • Power-Down Current (IPD) Specifications (see Table 20-7) • I/O pin Input Specifications (see Table 20-8) • BOR voltage limits (see Table 20-11) • Watchdog Timer time-out limits (see Table 20-21) Revision E (December 2006) This revision includes updates to the packaging diagrams. |
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