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DSPIC30F2012AT20E/ML Datasheet(PDF) 196 Page - Microchip Technology |
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DSPIC30F2012AT20E/ML Datasheet(HTML) 196 Page - Microchip Technology |
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196 / 205 page  dsPIC30F2011/2012/3012/3013 DS70139E-page 194 © 2006 Microchip Technology Inc. Erasing, Block ............................................................. 54 Erasing, Word ............................................................. 54 Protection Against Spurious Write .............................. 56 Reading....................................................................... 53 Write Verify ................................................................. 56 Writing ......................................................................... 55 Writing, Block .............................................................. 55 Writing, Word .............................................................. 55 DC Characteristics ............................................................ 145 BOR .......................................................................... 153 Brown-out Reset ....................................................... 153 I/O Pin Input Specifications ....................................... 151 I/O Pin Output Specifications .................................... 151 Idle Current (IIDLE) .................................................... 148 Low-Voltage Detect................................................... 152 LVDL ......................................................................... 152 Operating Current (IDD)............................................. 147 Power-Down Current (IPD) ........................................ 149 Program and EEPROM............................................. 154 Temperature and Voltage Specifications .................. 145 Development Support ....................................................... 141 Device Configuration Register Map............................................................. 132 Device Configuration Registers FBORPOR ................................................................ 130 FGS........................................................................... 130 FOSC ........................................................................ 130 FWDT........................................................................ 130 Device Overview ............................................................. 9, 17 Disabling the UART........................................................... 103 Divide Support..................................................................... 20 Instructions (Table) ..................................................... 20 DSP Engine......................................................................... 21 Multiplier...................................................................... 23 Dual Output Compare Match Mode .................................... 86 Continuous Pulse Mode .............................................. 86 Single Pulse Mode ...................................................... 86 E Electrical Characteristics AC ............................................................................. 155 DC ............................................................................. 145 Enabling and Setting Up UART Alternate I/O .............................................................. 103 Setting Up Data, Parity and Stop Bit Selections ....... 103 Enabling the UART ........................................................... 103 Equations ADC Conversion Clock ............................................. 111 Baud Rate ................................................................. 105 Serial Clock Rate ........................................................ 98 Errata .................................................................................... 7 Exception Sequence Trap Sources .............................................................. 65 External Clock Timing Characteristics Type A, B and C Timer ............................................. 163 External Clock Timing Requirements................................ 156 Type A Timer ............................................................ 163 Type B Timer ............................................................ 164 Type C Timer ............................................................ 164 External Interrupt Requests ................................................ 68 F Fast Context Saving............................................................ 68 Flash Program Memory....................................................... 47 I I/O Pin Specifications Input.......................................................................... 151 Output ....................................................................... 151 I/O Ports.............................................................................. 57 Parallel (PIO) .............................................................. 57 I2C 10-bit Slave Mode Operation ........................................ 95 Reception ................................................................... 96 Transmission .............................................................. 96 I2C 7-bit Slave Mode Operation.......................................... 95 Reception ................................................................... 95 Transmission .............................................................. 95 I2C Master Mode Operation................................................ 97 Baud Rate Generator ................................................. 98 Clock Arbitration ......................................................... 98 Multi-Master Communication, Bus Collision and Bus Arbitration .................................................... 98 Reception ................................................................... 98 Transmission .............................................................. 97 I2C Master Mode Support ................................................... 97 I2C Module Addresses................................................................... 95 Bus Data Timing Characteristics Master Mode..................................................... 173 Slave Mode....................................................... 175 Bus Data Timing Requirements Master Mode..................................................... 174 Slave Mode....................................................... 175 Bus Start/Stop Bits Timing Characteristics Master Mode..................................................... 173 Slave Mode....................................................... 175 General Call Address Support .................................... 97 Interrupts .................................................................... 97 IPMI Support............................................................... 97 Operating Function Description .................................. 93 Operation During CPU Sleep and Idle Modes ............ 98 Pin Configuration ........................................................ 93 Programmer’s Model .................................................. 93 Register Map .............................................................. 99 Registers .................................................................... 93 Slope Control .............................................................. 97 Software Controlled Clock Stretching (STREN = 1) ... 96 Various Modes............................................................ 93 Idle Current (IIDLE) ............................................................ 148 In-Circuit Serial Programming (ICSP)......................... 47, 119 Input Capture (CAPX) Timing Characteristics .................. 165 Input Capture Module ......................................................... 81 Interrupts .................................................................... 82 Register Map .............................................................. 83 Input Capture Operation During Sleep and Idle Modes...... 82 CPU Idle Mode ........................................................... 82 CPU Sleep Mode ........................................................ 82 Input Capture Timing Requirements................................. 165 Input Change Notification Module....................................... 61 dsPIC30F2012/3013 Register Map (Bits 7-0)............. 61 Instruction Addressing Modes ............................................ 41 File Register Instructions ............................................ 41 Fundamental Modes Supported ................................. 41 MAC Instructions ........................................................ 42 MCU Instructions ........................................................ 41 Move and Accumulator Instructions............................ 42 Other Instructions ....................................................... 42 Instruction Set Overview................................................................... 136 Summary .................................................................. 133 |
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