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DSPIC30F2012AT20E/ML Datasheet(PDF) 199 Page - Microchip Technology |
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DSPIC30F2012AT20E/ML Datasheet(HTML) 199 Page - Microchip Technology |
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199 / 205 page ![]() © 2006 Microchip Technology Inc. DS70139E-page 197 dsPIC30F2011/2012/3012/3013 Input Capture ............................................................ 165 Oscillator Start-up Timer ........................................... 161 Output Compare Module........................................... 166 Power-up Timer ........................................................ 161 Reset......................................................................... 161 Simple OC/PWM Mode ............................................. 167 SPI Module Master Mode (CKE = 0) .................................... 168 Master Mode (CKE = 1) .................................... 169 Slave Mode (CKE = 0) ...................................... 170 Slave Mode (CKE = 1) ...................................... 172 Type A Timer External Clock .................................... 163 Type B Timer External Clock .................................... 164 Type C Timer External Clock .................................... 164 Watchdog Timer........................................................ 161 Timing Specifications PLL Clock.................................................................. 157 Trap Vectors ....................................................................... 67 U UART Module Address Detect Mode ............................................... 105 Auto-Baud Support ................................................... 106 Baud Rate Generator................................................ 105 Enabling and Setting Up ........................................... 103 Framing Error (FERR)............................................... 105 Idle Status ................................................................. 105 Loopback Mode ........................................................ 105 Operation During CPU Sleep and Idle Modes .......... 106 Overview ................................................................... 101 Parity Error (PERR) .................................................. 105 Receive Break........................................................... 105 Receive Buffer (UxRXB) ........................................... 104 Receive Buffer Overrun Error (OERR Bit) ................ 104 Receive Interrupt....................................................... 104 Receiving Data.......................................................... 104 Receiving in 8-bit or 9-bit Data Mode........................ 104 Reception Error Handling.......................................... 104 Transmit Break.......................................................... 104 Transmit Buffer (UxTXB)........................................... 103 Transmit Interrupt...................................................... 104 Transmitting Data...................................................... 103 Transmitting in 8-bit Data Mode ................................ 103 Transmitting in 9-bit Data Mode ................................ 103 UART1 Register Map................................................ 107 UART2 Register Map................................................ 107 UART Operation Idle Mode .................................................................. 106 Sleep Mode............................................................... 106 Unit ID Locations............................................................... 119 Universal Asynchronous Receiver Transmitter (UART) Module ......................................................... 101 W Wake-up from Sleep ......................................................... 119 Wake-up from Sleep and Idle ............................................. 68 Watchdog Timer Timing Characteristics .............................................. 161 Timing Requirements................................................ 161 Watchdog Timer (WDT) ............................................ 119, 129 Enabling and Disabling ............................................. 129 Operation .................................................................. 129 WWW Address.................................................................. 199 WWW, On-Line Support ....................................................... 7 |
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