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CS5341 Datasheet(PDF) 11 Page - Cirrus Logic

Part # CS5341
Description  105 dB, 192 kHz, Multi-Bit Audio A/D Converter
PDF  22 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5341 Datasheet(HTML) 11 Page - Cirrus Logic

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DS564F1
11
CS5341
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT
(Logic "0" = GND = 0 V; Logic "1" = VL, CL = 20 pF)
11. For a description of speed modes, please refer to Table 1 on page 15.
Parameter
Symbol
Min
Typ
Max
Unit
MCLK Specifications
MCLK Period
tclkw
39
-
45
ns
78
-
1953
ns
MCLK Pulse Duty Cycle
40
-
60
%
Master Mode
SCLK falling to LRCK
Single-Speed
tmslr
-20
-
20
ns
Double-Speed
-20
-
20
ns
Quad-Speed
-8
-
8
ns
SCLK falling to SDOUT valid.
tsdo
-
-
32
ns
SCLK Duty Cycle.
Single-Speed
-
50
-
%
Double-Speed
-50-
%
Quad-Speed
-33-
%
Slave Mode
Single-Speed (Note 11)
LRCK Duty Cycle
40
50
60
%
SCLK Period
tsclkw
156
-
-
ns
SCLK Duty Cycle
45
50
55
%
SDOUT valid before SCLK rising
tstp
10
-
-
ns
SDOUT valid after SCLK rising
thld
5-
-
ns
SCLK falling to LRCK edge
tslrd
-20
-
20
ns
Double-Speed (Note 11)
LRCK Duty Cycle
40
50
60
%
SCLK Period
tsclkw
156
-
-
ns
SCLK Duty Cycle
45
50
55
%
SDOUT valid before SCLK rising
tstp
10
-
-
ns
SDOUT valid after SCLK rising
thld
5-
-
ns
SCLK falling to LRCK edge.
tslrd
-20
-
20
ns
Quad-Speed (Note 11)
LRCK Duty Cycle
40
50
60
%
SCLK Period
tsclkw
78
-
-
ns
SCLK Duty Cycle
29.7
33
50
%
SDOUT valid before SCLK rising
tstp
10
-
-
ns
SDOUT valid after SCLK rising
thld
5-
-
ns
SCLK falling to LRCK edge.
tslrd
-8
-
8
ns



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