ADS1626IPAPR datasheet(17/37 Pages) TI

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ADS1625

ADS1626

SBAS280E − JUNE 2003 − REVISED MAY 2007

www.ti.com

OVERVIEW

The ADS1625 and ADS1626 are high-performance

delta-sigma ADCs with a default oversampling ratio of 32.

The modulator uses an inherently stable 2-1-1 pipelined

delta-sigma

modulator

architecture

incorporating

proprietary circuitry that allows for very linear high-speed

operation. The modulator samples the input signal at

40MSPS (when fCLK = 40MHz). A low-ripple, linear-phase

digital filter decimates the modulator output to provide data

output word rates of 1.25MSPS with a signal passband out

to 615kHz.

Conceptually, the modulator and digital filter measure the

differential input signal, VIN = (AINP – AINN), against the

scaled differential reference, VREF = (VREFP – VREFN),

as shown in Figure 7. The voltage reference can either be

generated internally or supplied externally. An 18-bit paral-

lel data bus, designed for direct connection to DSPs, out-

puts the data. A separate power supply for the I/O allows

flexibility for interfacing to different logic families. Out-of-

range conditions are indicated with a dedicated digital out-

put pin. Analog power dissipation is controlled using an ex-

ternal resistor. This allows reduced dissipation when

operating at slower speeds. When not in use, power con-

sumption can be dramatically reduced using the PD pin.

The ADS1626 incorporates an adjustable FIFO for the out-

put data. The level of the FIFO is set by the FIFO_LEV[2:0]

pins. Other than the FIFO, the ADS1625 and ADS1626 are

identical, and together are referred to as the ADS1625/6.

ANALOG INPUTS (AINP, AINN)

The

ADS1625/6

measures

the

differential

signal,

VIN = (AINP − AINN), against the differential reference,

VREF = (VREFP – VREFN). The reference is scaled

internally so that the full-scale differential input voltage is

1.467VREF. That is, the most positive measurable

differential input is 1.467VREF, which produces the most

positive digital output code of 7FFFh. Likewise, the most

negative measurable differential input is –1.467VREF, which

produces the most negative digital output code of 8000h.

The ADS1625/6 supports a very wide range of input

signals. For VREF = 3V, the full scale input voltages are

±4.4V. Having such a wide input range makes out-of-range

signals unlikely. However, should an out-of-range signal

occur, digital output OTR will go high.

To achieve the highest analog performance, it is

recommended that the inputs be limited to

±1.165VREF

(−2dBFS).

For

VREF =

3V,

the

corresponding

recommended input range is

±3.78V.

The analog inputs must be driven with a differential signal

to achieve optimum performance. The recommended

common-mode

voltage

the

input

signal,

+ AINP ) AINN

, is 2.0V. For signals larger than

−2dBFS, the input common-mode voltage needs to be

raised in order to meet the absolute input voltage

specifications. The Typical Characteristics show how

performance varies with input common-mode voltage.

In addition to the differential and common-mode input

voltages, the absolute input voltage is also important. This

is the voltage on either input (AINP or AINN) with respect

to AGND. The range for this voltage is:

−0.1V < (AINN or AINP) < 4.6V.

If either input is taken below –0.1V, ESD protection diodes

on the inputs will turn on. Exceeding 4.6V on either input

will result in degradation in the linearity performance. ESD

protection diodes will also turn on if the inputs are taken

above AVDD (+5V).

For signals below –2dBFS, the recommended absolute

input voltage is:

0.1V < (AINN or AINP) < 4.2V

Keeping the inputs within this range provides for optimum

performance.

Σ∆

Modulator

Digital

Filter

Parallel

Interface

1.467V

REF

1.467

REF

VREFN

IOVDD

VREFP

AINP

AINN

OTR

FIFO_LEV[2:0]

DOUT[17:0]

ADS1626 Only

FIFO

Figure 7. Conceptual Block Diagram

ADS1626IPAPR Datasheet(PDF) 17 Page - Texas Instruments

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