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SX9331EVKA Datasheet(PDF) 10 Page - Semtech Corporation |
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SX9331EVKA Datasheet(HTML) 10 Page - Semtech Corporation |
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10 / 48 page ![]() SX9331 Final Datasheet April 21, 2023 www.semtech.com 10 of 48 Rev. 2 Proprietary & Confidential Semtech Parameter Symbol Conditions Min Typ. Max Unit I2C Timing Specifications (Cf. figure below) SCL clock frequency fSCL - - 400 kHz SCL low period tLOW 1.3 - - us SCL high period tHIGH 0.6 - - Data setup time tSU;DAT 0.1 - - Data hold time tHD;DAT 0 - - Repeated start setup time tSU;STA 0.6 - - Start condition hold time tHD;STA 0.6 - - Stop condition setup time tSU;STO 0.6 - - Bus free time between stop and start tBUF 1.3 - - Data valid time tVD;DAT - - 0.9 Data valid acknowledge time tVD;ACK - - 0.9 Rise time of SCL and SDA tR400 Load ≤ 400pF 20 - 300 ns Fall time of SCL and SDA tF400 Load ≤ 400pF 20*( VPULL /5.5) - 300 ns Input glitch suppression tSP Note 1 - - 50 ns Note 1: Minimum glitch amplitude is 0.7VDD at High level and Maximum 0.3VDD at Low level. Table 7: I2C Timing Specifications Figure 3: I2C Timing |
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