SN74HCS02DYYR datasheet(3/42 Pages) TI

3 / 42 page

5 Pin Configuration and Functions

GND

Figure 5-1. D, DB, N, NS, PW, J, or W Package

14-Pin SOIC, SSOP, PDIP, SO, TSSOP, CDIP, or CFP

Top View

10 11 12 13

1A 1Y NC V

CC 4Y

2B GND NC 3A 3B

Figure 5-2. FK Package

20-Pin LCCC

Top View

Pin Functions

I/O

DESCRIPTION

NAME

D, DB, N,

NS, PW, J,

or W

Output

Channel 1, Output Y

Input

Channel 1, Input A

Input

Channel 1, Input B

Output

Channel 2, Output Y

Input

Channel 2, Input A

Input

Channel 2, Input B

GND

—

Ground

Input

Channel 3, Input A

Input

Channel 3, Input B

Output

Channel 3, Output Y

Input

Channel 4, Input A

Input

Channel 4, Input B

Output

Channel 4, Output Y

VCC

—

Positive Supply

1, 5, 7, 11, 15,

—

Not internally connected

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SN74HC02, SN54HC02

SCLS076G – DECEMBER 1982 – REVISED DECEMBER 2020

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