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PIIPM50E06D004 Datasheet(PDF) 10 Page - International Rectifier |
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PIIPM50E06D004 Datasheet(HTML) 10 Page - International Rectifier |
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10 / 28 page  www.irf.com 10 PIIPM50P12B004 I27146 01/03 Other DSP pins mapping Symbol Signal Definition DSP pin name ;pin N Comments PWM1 OUT 1 high side IGBT gate drive signal PWM1;39 DSP Event Manager A output PWM2 OUT 1 low side IGBT gate drive signal PWM2;37 DSP Event Manager A output PWM3 OUT 2 high side IGBT gate drive signal PWM3;36 DSP Event Manager A output PWM4 OUT 2 low side IGBT gate drive signal PWM4;33 DSP Event Manager A output PWM5 OUT 3 high side IGBT gate drive signal PWM5;31 DSP Event Manager A output PWM6 OUT 3 low side IGBT gate drive signal PWM6;28 DSP Event Manager A output Enc1–Hall1 / SpiCK Incremental Encoder 1 / Hall effect sensor input 1/ SpiCK input (GND iso referenced) SPICK;24 QEP1;57 Optically isolated input Enc2 – Hall2 / SpiSTE Incremental Encoder 2 / Hall effect sensor input 2 / SpiSTE input (GND iso referenced) SPISTE~;23 QEP2; 55 Optically isolated input Strb – Hall3 / SpiRx Incremental Encoder Strobe / Hall effect sensor input 3 / SpiSIMO input (GND iso ref.) SPISIMO;21 CAP3; 52 Optically isolated input SpiTx SpiSOMI output (GND iso referenced) SPISOMI;22 Optically isolated input Ref3.3V 3.3V reference voltage Vrefhi;82 Vcca; 83 3.33V reference voltage for ADC converter 5V supp. Flash programming voltage pin Vccp;40 Supplied by the embedded flyback regulator Boot En~ Boot ROM enable signal BOOT_EN~;86 See also EDB electrical characteristics Tx SCI transmit data SCITXD;17 CANTX ; 50 Drives Tx+ and Tx- through an opto-isolator and a line driver Rx SCI receive data SCIRX ; 18 CANRX ; 49 Driven by Rx+ and Rx- through an opto-isolator and a line driver LFAULT System general fault input (latched) IOPF6;92 Activated by short circuits on output phases and DC bus minus and by DC bus over-voltage comparator LFAULT reset System general fault output reset signal IOPF5;89 LFAULT Reset signal, to be activated via software after a fault or system boot FAULT~ System general fault input (not latched) PDPINTA~;6 Activated by short circuits on output phases and DC bus minus and by DC bus over-voltage comparator RS~ DSP reset input signal (see also WD signal) RS~;93 Forces a DSP reset if WD signal holds too long (see also EDB electrical char.) Xtal1 PLL oscillator input pin XTAL1;87 A 10Mhz oscillator at 100ppm frequency stability feeds this pin. PLLF1 PLL filter input 1 PLLF;9 PLL filter for 40Mhz DSP clock frequency PLLF2 PLL filter input 2 PLLF2;8 PLL filter for 40Mhz DSP clock frequency PDPINTB External protection interrupt for EVB PDPINTB~;95 Not used pull up 4.7K to 3.3V ~ indicates active low signals |
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