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DSP56300 Datasheet(PDF) 81 Page - Freescale Semiconductor, Inc |
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DSP56300 Datasheet(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 108 page ![]() Extended Algorithm Program Listing Viterbi Decoder Implementation B-3 B.1 16-BIT ENHANCED VITERBI DECODER PROGRAM LISTING This appendix contains the complete 16-bit program listing for Section 4. The code in this section introduces several modifications to the code discussed in Section 3. Generalized branch metrics are allowed, as well as the optimization of the code that reduces the computations when data occurs in blocks. Example B-1 Extended Algorithm Program Listing OPT mex ;****************56600**VITERBI DECODER*********************************** ; THIS ROUTINE IMPLEMENTS A CONVOLUTIONAL DECODER USING THE VITERBI ALG. IT IS ; OPTIMIZED FOR SPEED, WHICH MEANS THAT EVERY ALU REGISTER AND ALL OF THE R REGISTERS ; ARE USED. A SIGNIFICANT AMOUNT OF THESE CAN BE FREED BY STORING AND REUSING ; REGISTERS BETWEEN THE FINDMETRICS ROUTINES AND THE ACS,ACSFlush ROUTINES. ; INPUT is at INDATA: real in x imag in y. OUTPUT begins at y:DECOUT ; GLOBAL REGISTER USE: a,b,x,y,r012345,n025,m245(are set to a modulo mode) ;*****************BRANCH METRIC MACRO************************************* ; FUNCTION: Input data and generate branch metrics. This function ; subtracts the path metric for state 0 from all branch metrics ; to provide autonormaliztion. For this decoder, the metric is a scaled ; sum or difference of the real and imag inputs. ; INPUTS: ; r2 should point to the beginning of the branch metric table ; r5 should point to the latest path metric for state 0 ; r1 should point to the next input XY data pair ; OUTPUTS: ; Branch metrics are stored at BRX in XY memory ; REGISTERS USED: ; a,b,x01,y01,r1,r2,r5, r5 unchanged,r2 unchanged (modulo req'd) ;*****************FINDMETRICS MACRO****************************************** FindMetrics macro move x:(r5),a ;st. metric scaling, read last st. 0 neg a l:(r1)+,y ;negate metric|grab dec input move #-16,x1 ;sign for real component, upper br. mac x1,y1,a a,b ;comp 0x partial br. path mt. to move y1,x0 ;mv real input to x0 mac x1,y0,a a,y1 ;a gets 00 br. y1 gets 0x partial br subl a,b b,x0 ;a has 00 br, b has 11 br, save path tfr y1,a a,y1 ;swap 0x and 00 to compute 01 branch mac -x1,y0,a b,x1 ;a gets 01 br tfr x0,b b,y0 ;swap path metric,11 branch to y0 subl a,b y1,x0 ;b gets 10 br, x0 has copy of 00 br. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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