REV. 0

AD1981BL

–15–

Table V. Settings for Record Select Control

LS [10:8]

Left Record Source

RS [2:0]

Right Record Source

000

MIC

000

MIC

001

CD_L

001

CD_R

010

Muted

010

Muted

011

AUX_L

011

AUX_R

100

LINE_IN_L

100

LINE_IN_R

101

Stereo Mix (L)

101

Stereo Mix (R)

110

Mono Mix

110

Mono Mix

111

PHONE_IN

111

PHONE_IN

RIM[3:0]

Right Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.

RM

Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately

from the IM bit. Otherwise, this bit will always read 0 and will have no affect when set to 1.

LIM[3:0]

Left Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.

IM

Input Mute. When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in

Register 76h is set to 1, in which case this mute bit will affect only the left channel.

Table VI. Settings for Record Gain Register

Reg. 76h

Control Bits—Record Gain (1Ch)

Left Channel Input Mixer D[11:8]

Right Channel Input Mixer D[3:0]

MSPLT

*

D15 Write

Readback

Function

D7

* Write Readback

Function

00

1111

1111

22.5 dB Gain

x

1111

1111

22.5 dB Gain

00

0000

0000

0 dB Gain

x

0000

0000

0 dB Gain

01

xxxx

xxxx

–

dB Gain, Muted

x

xxxx

xxxx

–

dB Gain, Muted

10

1111

1111

22.5 dB Gain

1

xxxx

xxxx

–

dB Gain, Right Only Muted

11

xxxx

xxxx

–

dB Gain, Left Only Muted 0

1111

1111

22.5 dB Gain

11

xxxx

xxxx

–

dB Gain, Left Muted

1

xxxx

xxxx

–

dB Gain, Right Muted

*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right

channels. If MSPLT is not set, RM bit has no effect.

x is a wild card and has no effect on the value.

RS[2:0]

Right Record Select

LS[2:0]

Left Record Select

Record Select Control Register (Index 1Ah)

Reg

No.

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

1Ah Record Select

X

X

X

X

X

LS2

LS1

LS0

X

X

X

X

X

RS2

RS1

RS0

0000h

All registers not shown and bits containing an X are assumed to be reserved. Used to select the record source independently for right and left. The default value is

0000h, which corresponds to MIC In. Refer to Table V for examples.

Record Gain Register (Index 1Ch)

Reg

No.

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

1Ch Record Gain

IM

X

X

X

LIM3

LIM2

LIM1

LIM0

RM

* XX

X

RIM3

RIM2

RIM1

RIM0 8000h

*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right

channels. If MSPLT is not set, RM bit has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table VI for examples.