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MM54HC154 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM54HC154 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 6 page  TLF5122 September 1990 MM54HC154MM74HC154 4-to-16 Line Decoder General Description This decoder utilizes advanced silicon-gate CMOS technol- ogy and is well suited to memory address decoding or data routing applications It possesses high noise immunity and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits The MM54HC154MM74HC154 have 4 binary select inputs (A B C and D) If the device is enabled these inputs deter- mine which one of the 16 normally high outputs will go low Two active low enables (G1 and G2) are provided to ease cascading of decoders with little or no external logic Each output can drive 10 low power Schottky TTL equiva- lent loads and is functionally and pin equivalent to the 54LS15474LS154 All inputs are protected from damage due to static discharge by diodes to VCC and ground Features Y Typical propagation delay 21 ns Y Power supply quiescent current 80 mA (74HC) Y Wide power supply voltage range 2 – 6V Y Low input current 1 mA maximum Connection Diagram Dual-In-Line Package TLF5122 – 1 Top View Order Number MM54HC154 or MM74HC154 Truth Table Inputs Low G1 G2 DC BA Output L L LLLL L L LLL H LL L L H L LL L L H H L L LHL L L L LHLH LL L H H L LL L H H H LL H L L L LL H L L H L L HLHL L L HLH H LL H H L L LL H H L H L L HHH L L L HHHH L H XXXX H L XXXX H H XXXX All others high C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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