Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

PPC405GPR-3JB333Z Datasheet(PDF) 6 Page - Applied Micro Circuits Corporation

Part # PPC405GPR-3JB333Z
Description  Power PC 405GPr Embedded Processor
PDF  57 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMCC [Applied Micro Circuits Corporation]
Direct Link  http://www.amcc.com
Logo AMCC - Applied Micro Circuits Corporation

PPC405GPR-3JB333Z Datasheet(HTML) 6 Page - Applied Micro Circuits Corporation

Back Button PPC405GPR-3JB333Z Datasheet HTML 2Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 3Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 4Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 5Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 6Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 7Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 8Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 9Page - Applied Micro Circuits Corporation PPC405GPR-3JB333Z Datasheet HTML 10Page - Applied Micro Circuits Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 57 page
background image
405GPr – Power PC 405GPr Embedded Processor
6
AMCC
Revision 2.04 – September 7, 2007
Data Sheet
PPC405GPr Embedded Controller Functional Block Diagram
The PPC405GPr is designed using the IBM® Microelectronics Blue LogicTM methodology in which major functional
blocks are integrated together to create an application-specific ASIC product. This approach provides a consistent
way to create complex ASICs using IBM CoreConnectTM Bus Architecture.
PPC405
Processor Core
DOCM
IOCM
DCU
ICU
OCM
Control
OCM
SRAM
DCR Bus
16KB
On-chip Peripheral Bus (OPB)
GPIO
IIC
UART
UART
MAL
Ethernet
DMA
Bridge
Processor Local Bus (PLB)
SDRAM
PCI Bridge
Code
Decompression
External
Bus
Controller
Controller
Clock
Control
Reset
Power
Mgmt
JTAG
Trace
Timers
MMU
MII
Controller
OPB
Interrupt
Controller
Arb
32-bit addr
32-bit data
13-bit addr
32-bit data
External
Bus Master
Controller
Universal
I-Cache
D-Cache
(4-Channel)
(CodePack
™)
66 MHz max (async)
DCRs
33 MHz max (sync)
16KB
Arb



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com