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SC1175CSW.TR Datasheet(PDF) 5 Page - Semtech Corporation |
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SC1175CSW.TR Datasheet(HTML) 5 Page - Semtech Corporation |
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5 / 23 page ![]() 5 2004 Semtech Corp. www.semtech.com SC1175 POWER MANAGEMENT Expanded Pin Description Expanded Pin Description Expanded Pin Description Expanded Pin Description Expanded Pin Description Pin 1: Pin 1: Pin 1: Pin 1: Pin 1: (VREF) Internal 1.25V reference Connected to the + input of the master channel error amplifier. Pin 2: Pin 2: Pin 2: Pin 2: Pin 2: (+IN) + Input of slave channel error amplifier. Connected to 1.25V reference (Pin 1) for the two independent channel configuration. Pin 3, 18: Pin 3, 18: Pin 3, 18: Pin 3, 18: Pin 3, 18: (-IN2, -IN1) - Inputs of close loop error amplifiers. Works as a feedback inputs (For both modes). Pin 4: Pin 4: Pin 4: Pin 4: Pin 4: (VCC) VCC chip supply voltage. 15V maximum, 10mA typical. Needs a 1µF ceramic multilayer decoupling capacitor to GND (Pin 20). Pin 5, 6, Pin 5, 6, Pin 5, 6, Pin 5, 6, Pin 5, 6,1 11 1 15, 1 5, 1 5, 1 5, 1 5, 16: 6: 6: 6: 6: (CL2-, CL2+, CL1+, CL1-) Pins (-) and (+) of the current limit amplifiers for both channels. Connected to output current sense resistors. Com- pares that sense voltage to internal 75mV reference. Needs RC filter for noise rejection. Pin 7, 14: Pin 7, 14: Pin 7, 14: Pin 7, 14: Pin 7, 14: (BST2, BST1) BST signal. Supply for high side driver. Can be connected to a high enough voltage source. Usually connected to bootstrap circuit. Pin 8, 13: Pin 8, 13: Pin 8, 13: Pin 8, 13: Pin 8, 13: (DH2, DH1) DH signal (Drive High). Gate drive for top MOSFETs. Requires a small series resistor. Pin 9, 12: Pin 9, 12: Pin 9, 12: Pin 9, 12: Pin 9, 12: (DL2, DL1) DL signal (Drive Low). Gate drive for bottom MOSFETs. Requires a small series resistor. Pin 10: Pin 10: Pin 10: Pin 10: Pin 10: (PGND) Power GND. Return of gate drive currents. Pin 11: Pin 11: Pin 11: Pin 11: Pin 11: (BSTC) Supply for bottom MOSFETs gate drive. Pin 1 Pin 1 Pin 1 Pin 1 Pin 17 77 7 7::::: (SS/ENA) Soft start pin. Internal current source connected to external capacitor. Inhibits the chip if pulled down. Pin 19: Pin 19: Pin 19: Pin 19: Pin 19: (PWRGD) Power good signal. Open collector signal . Turns to 0 if output voltage is outside the power good window. Pin 20: Pin 20: Pin 20: Pin 20: Pin 20: (GND) Analog GND. e c i v e D ) 1 ( e g a k c a P R T . W S C 5 7 1 1 C S0 2 - C I O S T R T W S C 5 7 1 1 C S ) 2 ( R T . S T 5 7 1 1 C S0 2 - P O S S T T R T S T 5 7 1 1 C S ) 2 ( 1 - B V E 5 7 1 1 C Sn o it a u l a v E n o i s r e V e r a h S t n e r r u C d r a o B 2 - B V E 5 7 1 1 C Sn o it a u l a v E n o i s r e V l e n n a h C l a u D d r a o B Notes: (1) Only available in tape and reel packaging. A reel contains 1000 (SOIC) and 2500 (TSSOP) devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. Pin Configuration Ordering Information Pin Descriptions Top View (SOIC-20 and TSSOP-20 Pin) |
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