SC2441ITSTRT datasheet(20/35 Pages) SEMTECH

20 / 35 page

 2005 Semtech Corp.

www.semtech.com

POWER MANAGEMENT

SC2441

Cin

Cou t

Rlo ad

Vin

vC (t )

iL (t )

VP N

Vbe 4

Vbe 3

Vgs2

Vgs1

Figure 12. The basic structure of combi-sense.

follow the gate drive signals Vgs1 and Vgs2 respectively

with minimal delay. The transition edges at the Virtual

Phase Node (VPN) therefore matches closely to those of

the Phase Node (PN).

When Q1/Q3 are on and Q2/Q4 are off, the circuit in Figure

12 is reduced to that of Figure 13 a). Here Rds1 is the on-

resistance of the top MOSFET. The branches {(Rds1+RL),

L} and {R

s, CS}, are in parallel. The DC voltage across L and

the DC current through C

S are both zero. There is no DC

voltage across R

s either. Therefore on average, the voltage

drop (Rds1+RL)I

o equals VCs. The DC inductor current can

be sensed from V

Cs if (Rds1+RL) is known.

When Q1/Q3 are off and Q2/Q4 are on, the equivalent

circuit of Figure 12 reduces to the sub-circuit in Figure

13b). Here Rds2 is the channel resistance of the bottom

MOSFET. In this case, the branch {R

s, Cs} is in parallel with

{(Rds2+RL), L} and V

Cs=(Rds2+RL)Io. Averaging over one

switching cycle,

Cin

Cout

Rload

Vin

vC(t)

iL(t)

Rds1

VPN

Figure 13. a) Equivalent sub-circuit.

Ci n

Cou t

Rload

Vin

vC (t)

iL(t)

Rds2

VPN

Figure 13. b) Equivalent sub-circuit.

Cs=[D(Rds1+RL)+(1-D)(Rds2+RL)]Io

Cs=[D Rds1+(1-D)Rds2+RL]Io:=ReqIo.

The DC voltage across V

Cs is independent of L, Rs and Cs. If

only the average load current is needed (as in average

current-mode control), this current sensing method will be

sufficient without any additional time-constant matching

constraint.

In peak current-mode control, the voltage ripple on C

s is

used as the modulating ramp. The V

Cs peak-to-peak

amplitude (denoted as

∆V

Cs) directly affects the signal-

to-noise ratio of the PWM operation. Small

∆V

Cs leads to

lower signal-to-noise ratio and more jittery operation.

Large

∆V

Cs leads to more circuit (power stage) sensitive

operation. A good compromise is to make

∆V

Cs~ReqδIo.

The above condition holds if the following time-constants

are made equal.

≈

If Rds1=Rds2, then R

eq = Rds1+ RL. For example, in the

application circuit, L=1.3µH, RL=1.56m

Ω and

Rds1=Rds2=8m

Ω , the time constant R

sCs should be set

as 136µs. If C

s=33nF, then Rs=4.12kΩ.

Applications Information (Cont.)

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