SC2463TSTRT datasheet(14/23 Pages) SEMTECH

14 / 23 page

 2007 Semtech Corp.

www.semtech.com

SC2463

POWER MANAGEMENT

Applications Information (Cont.)

design, the equivalent ESR should be evaluated at the

ripple frequency for voltage ripple calculation when both

ceramic and electrolytic capacitors are used. If R

1a = R1b

= R

1 and C1a = C1b = C1, then Req and Ceq will be frequency-

independent and

eq = 1/2 R1 and Ceq = 2C1.

Input Capacitor (C

in)))))

The input supply to the converter usually comes from a

pre-regulator. Since the input supply is not ideal, input

capacitors are needed to filter the current pulses at the

switching frequency. A simple buck converter is shown in

Figure 3.

Figure 3. A simple model for the converter input

In Figure 3 the DC input voltage source has an internal

impedance R

in and the input capacitor Cin has an ESR of

esr. MOSFET and input capacitor current waveforms, ESR

voltage ripple and input voltage ripple are shown in Figure

Figure 4. Typical waveforms at converter input

It can be seen that the current in the input capacitor

pulses with high di/dt. Capacitors with low ESL should be

used. It is also important to place the input capacitor

close to the MOSFET’s on the PC board to reduce trace

inductances around the pulse current loop.

The RMS value of the capacitor current is approximately

)

(

)

)(

[(

Cin

−

The power dissipated in the input capacitors is then

Cin = ICin

esr.

For reliable operation, the maximum power dissipation

in the capacitors should not result in more than 10oC of

temperature rise. Many manufacturers specify the

maximum allowable ripple current (ARMS) rating of the

capacitor at a given ripple frequency and ambient

temperature. The input capacitance should be high

enough to handle the ripple current. For higher power

applications, multiple capacitors are placed in parallel to

increase the ripple current handling capability.

Sometimes meeting tight input voltage ripple

specifications may require the use of larger input

capacitance. At full load, the peak-to-peak input voltage

ripple due to the ESR is

(

esr

ESR

∆

The peak-to-peak input voltage ripple due to the capacitor

C ≈

∆

From these two expressions, C

IN can be found to meet

the input voltage ripple specification. In a multi-phase

converter, channel interleaving can be used to reduce

ripple. The two step-down channels of the SC2463

operate at 180 degrees from each other. If both step-

down channels in the SC2463 are connected in parallel,

both the input and the output RMS currents will be

reduced.

Ripple cancellation effect of interleaving allows the use

of smaller input capacitors. When converter outputs are

connected in parallel and interleaved, smaller inductors

and capacitors can be used for each channel. The total

output ripple-voltage remains unchanged. Smaller

inductors speeds up output load transient.

SC2463TSTRT Datasheet(PDF) 14 Page - Semtech Corporation

SC2463TSTRT Datasheet(HTML) 14 Page - Semtech Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Datasheet Download

Link URL