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STI5107 Datasheet(PDF) 8 Page - STMicroelectronics |
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STI5107 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 14 page ![]() Architecture features STi5107 8/14 Programmable transport interface (PTI) The PTI hardware performs the following functions: ● descrambling, demultiplexing and data filtering, ● PES data is transferred by DMA to audio and video decoders via circular buffers, ● section data is transferred by DMA to separate buffers for further processing by the CPU, ● DVB transport streams with data rates up to 100 Mbit/s, ● PID filtering to select the audio, video and data packets to be processed, ● can support 48 PID slots. ● descramble streams using the following ciphers: – DVB-CSA, – NDS specific streams that are supported by the integrated ICAM functionality. ● has a section filter core that filters DVB standard sections using 96x 8-byte or 48x 16- byte filters. 2.6 MPEG graphics and display processing The MPEG graphics and display architecture shown in Figure 6 provides the graphics, video-stream processing and display capabilities of the STi5107. Figure 6. Graphics and display subsystem Video decode and display The video decoder is based on the Omega2 cell and provides a memory to memory decode into YC 4:2:0 macroblock format, it is able to provide simple resizing based on x2 and x0.5. The GDMA retrieves the final composition from main memory and transfers it to the DENC, which in turn drives the output video DAC. 16 SDRAM Omega2 interconnect LMI Omega2 video decoder GDMA DENC VDAC Analog video out Blitter Digital video |
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