TEWS TECHNOLOGIES GmbH keeps the right to change technical specification without further notice.

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Issue 1.0.2

2023-02-07

TEWS TECHNOLOGIES GmbH

Am Bahnhof 7

25469 Halstenbek, Germany

Phone: +49 (0) 4101 4058 0

Fax: +49 (0) 4101 4058 19

e-mail: info@tews.com

www.tews.com

The Embedded I/O Company

The TPMC543 provides dedicated A/D and D/A sequencer

units for periodic analog-to-digital and digital-to-analog

conversions at a configurable conversion rate.

In sequencer mode, A/D conversion data is temporarily

stored in an on-board data buffer and is transferred to

system memory by PCI master DMA transfer while D/A

conversion data is fetched from buffers in system memory

by PCI master DMA transfer and is temporarily stored in an

on-board data buffer.

The sequencers provide a Frame Mode for repetitive

frames of A/D and D/A conversions upon an internal or

external trigger signal event.

Conversion clock (conversion rate) and frame trigger

signals may be generated on-board for internal use and

may also be driven out on P14 rear I/O if the card is

operating as a master card in a Multi-Board configuration.

The conversion clock (conversion rate) and frame trigger

signals may also be sourced externally via the P14 rear I/O

interface if the card is operating as a slave card in a Multi-

Board configuration.

Each of the ESD protected digital I/O lines has a dedicated

line transmitter with individual output enable control and a

dedicated line receiver. The line receivers are always

enabled, so the digital I/O line level can always be

monitored.

Each digital I/O line input is capable of generating an

interrupt triggered on rising edge, falling edge or both.

Additionally, a glitch filter can be configured to get rid of

bouncing on the digital I/O inputs.

Each digital I/O line has a pull resistor to a common

reference.

The

common

pull

resistor

reference

is

programmable by software to +3.3V, +5V or GND.

Each TPMC543 is factory calibrated. The correction data is

stored in an on-board serial EEPROM unique to each PMC

module. The correction data values may be used to perform

a hardware correction for any A/D channel and input range

and any D/A channel and output range.

The analog input, analog output and digital I/O signals are

accessible via a Mini D Ribbon (MDR68) type front I/O

connector.

Technical Information



Standard single-wide PCI Mezzanine Card (PMC)



32bit / 33MHz PCI with PCI Master DMA capability



Mini D Ribbon (MDR68) type front I/O connector



8 ESD protected tristate capable 5V-tolerant

LVTTL/TTL digital input/output channels



Programmable digital input glitch-filter



4 Multi-Channel 16 bit ADC devices



Channel sample rate from 100ksps to 800ksps

(depending on number of active channels per

ADC)



8 differential analog current input channels



Current input range: ±25mA



16 single-ended / 8 differential analog high-voltage

input channels



Single-Ended ranges per channel : ±10V,

±20V, ±40V, ±48V



Differential ranges per channel: ±10V, ±20V,

±40V, ±80V, ±96V



2 Multi-Channel, Multi-Mode 16 bit DAC devices



8 single-ended voltage or current mode analog output

channels



Up to 38ksps simultaneous conversion rate



Output voltage ranges per channel:



Unipolar: 0-5V, 0-6V, 0-10V, 0-12V



Bipolar: ±5V, ±6V, ±10V, ±12V



Output current ranges per channel



4-20mA, 0-20mA, 0-24mA



Programmable conversion rates



Conversion signal can be output to other cards



Conversion signal can be input from other cards



I/O Trigger signal for synchronization



Hardware Correction Option, Factory calibrated



Temperature Sensor on-board



Operating Temperature Range -40° to +85° (forced

air cooling is required)