BUS IC

DC/DC CONVERTER

MOTOR DRIVER IC

RIPPLE COUNTER

56

BLOCK DIAGRAM

DRIVER IC

I/O IC

SENSOR IC

SENSOR INTERFACE IC

57

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circuits described herein, conveys no licence under any patent or other right, and makes no representation that the circuits are free of patent infringement. While the information in this publication

has been checked, no responsibility, however, is assumed for inaccuracies. ELMOS does not recommend the use of any of its products in life support applications where the failure or malfunction of

the product can reasonably be expected to cause failure of a life-support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications.

Copyright © 2005 ELMOS Reproduction, in part or whole, without the prior written consent of ELMOS, is prohibited.

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PINNING

PACKAGE

ÿ Low side driver 8x, serial

Low side driver 8x, parallel

LCD controller

ÿ Low side driver (8 channel, serial interface)

E910.01

FEATURES

hysteresis

(5.5 to 25.5V)

APPLICATION

Driver for:

DESCRIPTION

The IC is developed for automotive applications and can also

be used in several other application areas. The IC is well suited

to drive relays, lamps, bus systems etc. with medium power

consumption.

The device provides a serial data bus for comunication with a µC

and 8 identical power drivers. All outputs are short circuit pro-

tected. A thermal shut-off protects the device against thermal

overload. Readback capability enables fault detection as well as

simple switch monitoring.

µC

8

8

8

Interface

control

Logic

OVLD

Prot.

OUT 0

VDD

VDD

Reset

CE

SCLK

SI

SO

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

GND

TEST

OUT3

OUT2

OUT1

OUT0

CE

SCLK

SI

GND

GND

NC

OUT4

OUT5

OUT6

OUT7

RESET

VDD

SO

GND

Pin Name

Description

1

GND

Ground

2

TEST

Connect to ground

3

OUT3

Open - drain low - side driver

4

OUT2

Open - drain low - side driver

5

OUT1

Open - drain low - side driver

6

OUT0

Open - drain low - side driver

7

CE

Open - drain low - side driver

8

SCLK

Chip enable - active low (output data is read

back on the falling edge of the pulse and only

after 8x n falling edges on SCLK is the output

data clocked on the next rising edge)

9

SI

Serial clock input

10

GND

Serial data input

11

GND

Ground

12

SO

Ground

13

VDD

Serial data output (high impendence when CE = High)

14

RESET

Supply voltage

15

OUT7

External reset - active low (= internal power on reset)

16

OUT6

Open - drain low - side driver

17

OUT5

Open - drain low - side driver

18

OUT4

Open - drain low - side driver

19

NC

Not connected

20 GND

Ground