TMP93CS44 datasheet(137/224 Pages) TOSHIBA

137 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-135

3. Serial clock generation circuit

This circuit generates the basic clock for transmitting and receiving data.

•

I/O interface mode

When in SCLK output mode with the setting of SC0CR<IOC>

= 0, the basic clock

will be generated by dividing by 2 the output of the baud rate generator described

before. When in SCLK input mode with the setting of SC0CR<IOC>

= 1, the rising

edge or falling edge will be detected according to the setting of SC0CR<SCLKS>

•

UART mode

According to the setting of SC0MOD<SC1:0>, the above baud rate generator

clock, internal clock

φ1 (Max 625 kbps at fc = 20 MHz), the match detect signal

from timer 0, or external clock SCLK0 will be selected to generate the basic clock

SIOCLK.

4. Receiving counter

The receiving counter is a 4-bit binary counter used in UART mode and counts up by

SIOCLK clock. 16 pulses of SIOCLK are used for receiving 1 bit of data, and the data

bit is sampled three times at 7th, 8th and 9th clock.

With the three samples, the received data is evaluated by the rule of majority.

For example, if the sampled data bit is “1”, “0” and “1” at 7th, 8th and 9th clock

respectively, the received data is evaluated as “1”. The sampled data “0”, “0” and “1” is

evaluated that the received data is “0”.

5. Receiving control

•

I/O interface mode

When in SCLK output mode with the setting of SC0CR<IOC>

= 0, RXD0 signal

will be sampled at the rising edge of shift clock which is output to SCLK0 pin.

When in SCLK input mode with the setting SC0CR<IOC>

= 1 RXD0 signal will

be sampled at the rising edge or falling edge of SCLK0 input according to the

setting of SC0CR<SCLKS> register.

•

UART mode

The receiving control has a circuit for detecting the start bit by the rule of

majority. When two or more “0” are detected during 3 samples, it is recognized as

start bit and the receiving operation is started.

Data being received are also evaluated by the rule of majority.

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