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TMP93CS44 Datasheet(PDF) 203 Page - Toshiba Semiconductor |
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TMP93CS44 Datasheet(HTML) 203 Page - Toshiba Semiconductor |
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203 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-201 (1) I/O port Symbol Name Address 7 6 5 4 3 2 1 0 P07 P06 P05 P04 P03 P02 P01 P00 R/W Undefined P0 Port 0 00H Input mode P17 P16 P15 P14 P13 P12 P11 P10 R/W 0 0 0 0 0 0 0 0 P1 Port 1 01H Input mode P27 P26 P25 P24 P23 P22 P21 P20 R/W 1 1 1 1 1 1 1 1 P2 Port 2 06H (Prohibit RMW*) Input mode P35 P34 P33 P32 P31 P30 (Note1) R/W 1 1 1 1 1 1 P3 Port 3 07H (Prohibit RMW*) Input mode Output mode P47 P46 P45 P44 P43 P42 P41 P40 R/W 1 1 1 1 1 1 1 1 P4 Port 4 0CH Input mode P57 P56 P55 P54 P53 P52 P51 P50 R P5 Port 5 0DH Input mode P67 P66 P65 P64 P63 P62 P61 P60 R/W 1 1 1 1 1 1 1 1 P6 Port 6 12H (Prohibit RMW*) Output mode Input mode P77 P76 P75 P74 P73 P72 P71 P70 R/W 1 1 1 1 1 1 1 1 P7 Port 7 13H Input mode Note 1: When P30 pin is defined as RD signal output mode (P30F = 1), clearing the output latch register P30 to 0 outputs the RD strobe from P30 pin for PSRAM, even when the internal address is accessed. If the output latch register P30 remains 1, the RD strobe is output only when the external address is accessed. Note 2: Port 66 and 67 are also used as XT1, XT2. Therefore these pins are open drain output type. Read/Write R/W: Either read or write is possible. R: Only read is possible. W: Only write is possible. Prohibit RMW: Prohibit read-modify-write. (Prohibit RES/SET/TSET/CHG/STCF/ANDCF/ORCF/XORCF instruction.) Prohibit RMW*: Read-modify-write is prohibited when controlling the PU resistor. |
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