V-Series Isolators

9

NVE Corporation

11409 Valley View Road, Eden Prairie, MN 55344-3617

Phone: (952) 829-9217

Fax: (952) 829-9189

www.IsoLoop.com

©NVE Corporation

Magnetic Field Immunity(8) (VDD2= 5V, 3V<VDD1<5.5V)

Power Frequency Magnetic Immunity

HPF

2800

3500

A/m

50Hz/60Hz

Pulse Magnetic Field Immunity

HPM

4000

4500

A/m

tp = 8µs

Damped Oscillatory Magnetic Field

HOSC

4000

4500

A/m

0.1Hz – 1MHz

Cross-axis Immunity Multiplier(9)

KX

2.5

Timing Diagram

Legend

t

PLH

Propagation Delay, Low to High

t

PHL

Propagation Delay, High to Low

t

PW

Minimum Pulse Width

t

R

Rise Time

t

F

Fall Time

Notes (apply to both 3.3 V and 5 V specifications):

1.

Absolute maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not

guarantee performance.

2.

PWD is defined as |t

PHL − tPLH|. %PWD is equal to PWD divided by pulse width.

3.

t

PSK is the magnitude of the worst-case difference in tPHL and/or tPLH between devices at 25°C.

4.

CM

H is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD

2. CML is the maximum

common mode input voltage that can be sustained while maintaining V

O < 0.8 V. The common mode voltage slew rates apply to both rising

and falling common mode voltage edges.

5.

Device is considered a two terminal device: pins 1–4 shorted and pins 5–8 shorted.

6.

Dynamic power consumption is calculated per channel and is supplied by the channel’s input side power supply.

7.

Minimum pulse width is the minimum value at which specified PWD is guaranteed.

8.

The relevant test and measurement methods are given in the Electromagnetic Compatibility section on p. 6.

9.

External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than to “pin-to-pin” (see diagram on p. 6).

10. 64k-bit pseudo-random binary signal (PRBS) NRZ bit pattern with no more than five consecutive 1s or 0s; 800 ps transition time.