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TC74HC175AP Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74HC175AP Datasheet(HTML) 1 Page - Toshiba Semiconductor |
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1 / 10 page ![]() TC74HC175AP/AF/AFN 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC175AP,TC74HC175AF,TC74HC175AFN Quad D-Type Flip Flop with Clear The TC74HC175A is a high speed CMOS D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q and Q outputs on the positive going edge of the clock pulse. When the CLR input is held low, the Q outputs are at the low logic level and the Q outputs are at the high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: fmax = 63 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 6 V • Pin and function compatible with 74LS175 Pin Assignment Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC175AP TC74HC175AF TC74HC175AFN Weight DIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.) |
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