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TC9328AF Datasheet(PDF) 8 Page - Toshiba Semiconductor |
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TC9328AF Datasheet(HTML) 8 Page - Toshiba Semiconductor |
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8 / 84 page ![]() TC9328AF 2004-09-13 8 Pin No. Symbol Pin Name Function and Operation Remarks 45 46 IFin1/IN1 IFin2/IN2 IF signal input /Input port IF signal input pin for the IF counter to count the IF signals of the FM and AM bands and to detect the automatic stop position. The input frequency is between 0.3 to 12 MHz. A built-in input amp. and C coupling allow operation at low-level input. The IF counter is a 20-bit counter with optional gate times of 1, 4, 16 and 64 ms. 20 bits of data can be readily stored in memory. In Manual mode, gate On/Off can be performed using instruction. The input pin can be programmed for use as an input port (IN port). Note: When a pin is set to IF input, the input is at high impedance in PLL Off mode or if the pins are not used for input. 31, 50 VDD 47, 73 GND Power-supply pins Pins to which power is applied. Normally, VDD = 0.9~1.8 V is applied. For the PLL, power for the prescaller in the programmable counter block and IF input amp can be individually programmed. By switching to different modes depending on the power supply voltage and the frequency used, current dissipation can be lowered. Connect a stabilizing capacitor between the VDD pin and GND (4.7 µF, 0.01 µF typ.). In backup state (at execution of the CKSTP instruction), current dissipation drops (1 µA or less) and the power supply voltage can be reduced to 0.75 V. If more than 0.9 V is applied when the pin voltage is 0, the device system is reset and the program starts from address “0”. (Power on reset) Note: To operate the power on reset, the power supply should start up in 10~100 ms. Note: The power-on reset function can be enabled/disabled using the AI switch. VDD RfIN2 GND VDD |
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