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STM32G474CB Datasheet(PDF) 136 Page - STMicroelectronics

Part # STM32G474CB
Description  Arm® Cortex®-M4 32b MCUFPU, up to 512 KB Flash, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math accelerator, 184ps 12ch Hi-res timer
PDF  232 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G474CB Datasheet(HTML) 136 Page - STMicroelectronics

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Electrical characteristics
STM32G474xB STM32G474xC STM32G474xE
136/232
DS12288 Rev 1
Output voltage levels
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized in
Table 17: General operating conditions. All I/Os are CMOS- and TTL-compliant (FT OR TT
unless otherwise specified).
Input/output AC characteristics
The definition and values of input/output AC characteristics are given in Figure 25 and
Table 59, respectively.
Unless otherwise specified, the parameters given are derived from tests performed under
the ambient temperature and supply voltage conditions summarized in Table 17: General
operating conditions.
Table 58. Output voltage characteristics(1)(2)
Symbol
Parameter
Conditions
Min
Max
Unit
VOL(3) Output low level voltage for an I/O pin CMOS port
|IIO| = 2 mA for FT_c
I/Os = 8 mA for other I/Os VDD
≥ 2.7 V
-0.4
V
VOH(3) Output high level voltage for an I/O pin
VDD-0.4
-
VOL(3) Output low level voltage for an I/O pin TTL port
|IIO| = 2 mA for FT_c
I/Os = 8 mA for other I/Os
VDD ≥ 2.7 V
-0.4
VOH(3) Output high level voltage for an I/O pin
2.4
-
VOL(3) Output low level voltage for an I/O pin All I/Os except FT_c
|IIO| = 20 mA
VDD ≥ 2.7 V
-1.3
VOH(3) Output high level voltage for an I/O pin
VDD-1.3
-
VOL(3) Output low level voltage for an I/O pin |IIO| = 1 mA for FT_c
I/Os = 4 mA for other I/Os
VDD ≥ 1.62 V
-0.4
VOH(3) Output high level voltage for an I/O pin
VDD-0.45
-
VOLFM+
(3)
Output low level voltage for an FT I/O
pin in FM+ mode (FT I/O with “f”
option)
|IIO| = 20 mA
VDD ≥ 2.7 V
-0.4
|IIO| = 10 mA
VDD ≥ 1.62 V
-0.4
1. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 14:
Voltage characteristics, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must always
respect the absolute maximum ratings ΣIIO.
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. Guaranteed by design.



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