STM32G474CB datasheet(140/232 Pages) STMICROELECTRONICS

140 / 232 page

Electrical characteristics

STM32G474xB STM32G474xC STM32G474xE

140/232

DS12288 Rev 1

Figure 26. Recommended NRST pin protection

1. The reset network protects the device against parasitic resets.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 61: NRST pin characteristics. Otherwise the reset is not taken into account by the device.

3. The external capacitor on NRST must be placed as close as possible to the device.

5.3.16

High-resolution timer (HRTIM)

The parameters given in Table 62 are derived from tests performed under ambient

temperature and supply voltage conditions summarized in Table 17.

Table 62. HRTIM characteristics(1)

1. Data based on characterization results, not tested in production.

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Timer ambient

temperature range

fHRTIM=170 MHz

-40

125

°C

fHRTIM

HRTIM input clock

for DLL calibration

As per TA conditions

170

MHz

tHRTIM

5.88

tRES(HRTIM)

high-resolution

step size

fHRTIM=170 MHz,

TA from -40 to 105°C

184

ResHRTIM

Timer resolution

bit

tDTG

Dead time

generator clock

period

-0.125

tHRTIM

fHRTIM=170 MHz

0.735

94.1

|tDTR| / |tDTF|

max

Dead time range

(absolute value)

511

tDTG

fHRTIM=170 MHz

48.09

µs

fCHPFRQ

Chopper stage

clock frequency

1/256

1/16

fHRTIM

fHRTIM=170 MHz

0.664

10.625

MHz

t1STPW

Chopper first

pulse length

-16

256

tHRTIM

fHRTIM=170 MHz

0.094

1.506

µs

STM32G474CB Datasheet(PDF) 140 Page - STMicroelectronics

STM32G474CB Datasheet(HTML) 140 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL