FS32K144HAT0MLHT datasheet(10/84 Pages) NXP

10 / 84 page

The supply should be kept in operating conditions and once out of operating conditions, the device should be either reset

or powered off.

Operation with supply between 5.5 V and 5.8 V not in reset condition is allowed for 60 seconds cumulative over lifetime,

the part will operate with reduced functionality.

Operation with supply between 5.5 V and 5.8 V but held in reset condition by external circuit is allowed for 10 hours

cumulative over lifetime.

If the given time limits or supply levels are exceeded, the device may get damaged.

4. When input pad voltage levels are close to VDD or VSS, practically no current injection is possible.

5. While respecting the maximum current injection limit

6. This is the Electronic Control Unit (ECU) supply ramp rate and not directly the MCU ramp rate. Limit applies to both

maximum absolute maximum ramp rate and typical operating conditions.

7. This is the MCU supply ramp rate and the ramp rate assumes that the S32K1xx HW design guidelines in AN5426 are

followed. Limit applies to both maximum absolute maximum ramp rate and typical operating conditions.

8. TJ (Junction temperature)=135 °C. Assumes TA=125 °C for RUN mode

TJ (Junction temperature)=125 °C. Assumes TA=105 °C for HSRUN mode

• Assumes maximum

θJA for 2s2p board. See Thermal characteristics

9. 60 seconds lifetime; device in reset (no outputs enabled/toggling)

4.2 Voltage and current operating requirements

NOTE

Device functionality is guaranteed up to the LVR assert level,

however electrical performance of 12-bit ADC, CMP with 8-bit

DAC, IO electrical characteristics, and communication modules

electrical characteristics would be degraded when voltage drops

below 2.7 V

Table 2. Voltage and current operating requirements 1

Symbol

Description

Min.

Max.

Unit

Notes

VDD2

Supply voltage

2.73

5.5

VDD_OFF

Voltage allowed to be developed on VDD

pin when it is not powered from any

external power supply source.

0.1

VDDA

Analog supply voltage

2.7

5.5

VDD – VDDA

VDD-to-VDDA differential voltage

– 0.1

0.1

VREFH

ADC reference voltage high

2.7

VDDA + 0.1

VREFL

ADC reference voltage low

-0.1

0.1

VODPU

Open drain pullup voltage level

VDD

IINJPAD_DC_OP7

Continuous DC input current (positive /

negative) that can be injected into an I/O

-3

IINJSUM_DC_OP

Continuous total DC input current that can

be injected across all I/O pins such that

there's no degradation in accuracy of

analog modules: ADC and ACMP (See

section Analog Modules)

—

General

S32K1xx Data Sheet, Rev. 9, 09/2018

NXP Semiconductors

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