LTC2855IGN datasheet(12/16 Pages) LINER

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LTC2854/LTC2855

285455fa

285455 F14

DATA RATE (bps)

10k

10M

100k

100M

100

10k

RS485/RS422

MAX DATA RATE

LTC2854/LTC2855

MAX DATA RATE

Supply Current

The unloaded static supply currents in the LTC2854/

LTC2855 are very low —typically under 500μA for all

modes of operation. In applications with resistively ter-

minated cables, the supply current is dominated by the

driver load. For example, when using two 120Ω termina-

tors with a differential driver output voltage of 2V, the DC

current is 33mA, which is sourced by the positive voltage

supply. This is true whether the terminators are external

or internal such as in the LTC2854/LTC2855. Power sup-

ply current increases with toggling rate due to capacitive

loading and this term can increase signiﬁcantly at high

data rates. Figure 13 shows supply current vs data rate for

two different capacitive loads for the circuit conﬁguration

of Figure 4.

High Speed Considerations

A ground plane layout is recommended for the LTC2854/

LTC2855. A 0.1μF bypass capacitor less than one-quarter

inch away from the VCC pin is also recommended. The PC

board traces connected to signals A/B and Z/Y (LTC2855)

should be symmetrical and as short as possible to maintain

good differential signal integrity. To minimize capacitive

effects, the differential signals should be separated by more

than the width of a trace and should not be routed on top

of each other if they are on different signal planes.

Care should be taken to route outputs away from any

sensitive inputs to reduce feedback effects that might

cause noise, jitter, or even oscillations. For example, in

the full duplex LTC2855, DI and A/B should not be routed

near the driver or receiver outputs.

The logic inputs of the LTC2854/LTC2855 have 150mV of

hysteresis to provide noise immunity. Fast edges on the

outputs can cause glitches in the ground and power supplies

which are exacerbated by capacitive loading. If a logic input

is held near its threshold (typically 1.5V), a noise glitch

from a driver transition may exceed the hysteresis levels

on the logic and data input pins causing an unintended

state change. This can be avoided by maintaining normal

logic levels on the pins and by slewing inputs through

their thresholds by faster than 1V/μs when transitioning.

Good supply decoupling and proper line termination also

reduces glitches caused by driver transitions.

Cable Length vs Data Rate

For a given data rate, the maximum transmission distance

is bounded by the cable properties. A typical curve of

cable length vs data rate compliant with the RS485/RS422

standards is shown in Figure 14. Three regions of this

curve reﬂect different performance limiting factors in data

transmission. In the ﬂat region of the curve, maximum

distance is determined by resistive losses in the cable. The

downward sloping region represents limits in distance and

data rate due to AC losses in the cable. The solid vertical

line represents the speciﬁed maximum data rate in the

RS485/RS422standards.Thedashedlinesat20Mbpsshow

the maximum data rates of the LTC2854/LTC2855.

Figure 14. Cable Length vs Data Rate (RS485/

RS422 Standards Shown in Vertical Solid Line)

Figure 13. Supply Current vs Data Rate

DATA RATE (Mbps)

0.1

100

285455 F13

RDIFF = 54Ω

CL = 1000pF

CL = 100pF

APPLICATIONS INFORMATION

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