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M25PE16-VMP6TP Datasheet(PDF) 36 Page - STMicroelectronics

Part # M25PE16-VMP6TP
Description  16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte-alterability, 50 MHz SPI bus, standard pinout
PDF  56 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M25PE16-VMP6TP Datasheet(HTML) 36 Page - STMicroelectronics

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Instructions
M25PE16
36/56
6.11
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address Bytes (pointing to any address in the
targeted sector and one data Byte on Serial Data Input (D). The instruction sequence is
shown in Figure 16. Chip Select (S) must be driven High after the eighth bit of the data Byte
has been latched in, otherwise the Write to Lock Register (WRLR) instruction is not
executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than tSHSL minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 16.
Write to Lock Register (WRLR) instruction sequence
Table 10.
Lock Register in
Sector
Bit
Value
All Sectors
b7-b2
‘0’
b1
Sector Lock Down Bit Value (refer to Table 9)
b0
Sector Write Lock Bit Value (refer to Table 9)
AI10784
C
D
S
23
2
1
3456789 10
28 29 30 31 32 33 34 35
22 21
3210
36 37 38
Instruction
24-Bit Address
0
765432
0
1
Lock Register
In
39
MSB
MSB



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